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  /src/external/apache2/llvm/dist/llvm/include/llvm/Support/
TaskQueue.h 69 TaskQueue(ThreadPool &Scheduler) : Scheduler(Scheduler) { (void)Scheduler; }
73 Scheduler.wait();
97 Scheduler.async(std::move(T));
120 Scheduler.async(std::move(Continuation));
124 ThreadPool &Scheduler;
  /src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
Scheduler.cpp 1 //===--------------------- Scheduler.cpp ------------------------*- C++ -*-===//
9 // A scheduler for processor resource units and processor resource groups.
13 #include "llvm/MCA/HardwareUnits/Scheduler.h"
22 void Scheduler::initializeStrategy(std::unique_ptr<SchedulerStrategy> S) {
32 void Scheduler::dump() const {
33 dbgs() << "[SCHEDULER]: WaitSet size is: " << WaitSet.size() << '\n';
34 dbgs() << "[SCHEDULER]: ReadySet size is: " << ReadySet.size() << '\n';
35 dbgs() << "[SCHEDULER]: IssuedSet size is: " << IssuedSet.size() << '\n';
40 Scheduler::Status Scheduler::isAvailable(const InstRef &IR)
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  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/Stages/
ExecuteStage.h 12 /// The ExecuteStage is responsible for managing the hardware scheduler
21 #include "llvm/MCA/HardwareUnits/Scheduler.h"
29 Scheduler &HWS;
50 ExecuteStage(Scheduler &S) : ExecuteStage(S, false) {}
51 ExecuteStage(Scheduler &S, bool ShouldPerformBottleneckAnalysis)
64 // Notifies the scheduler that a new cycle just started.
66 // This method notifies the scheduler that a new cycle started.
68 // state changes, and processor resources freed by the scheduler.
  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/
Scheduler.h 1 //===--------------------- Scheduler.h ------------------------*- C++ -*-===//
10 /// A scheduler for Processor Resource Units and Processor Resource Groups.
34 /// This method is used by class Scheduler to select the "best" ready
39 /// Default instruction selection strategy used by class Scheduler.
63 /// Class Scheduler is responsible for issuing instructions to pipeline
70 class Scheduler : public HardwareUnit {
73 // Instruction selection strategy for this Scheduler.
76 // Hardware resources that are managed by this scheduler.
79 // Instructions dispatched to the Scheduler are internally classified based on
82 // An Instruction dispatched to the Scheduler is added to the WaitSet if no
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  /src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
ExecuteStage.cpp 12 /// The ExecuteStage is responsible for managing the hardware scheduler
26 HWStallEvent::GenericEventType toHWStallEventType(Scheduler::Status Status) {
28 case Scheduler::SC_LOAD_QUEUE_FULL:
30 case Scheduler::SC_STORE_QUEUE_FULL:
32 case Scheduler::SC_BUFFERS_FULL:
34 case Scheduler::SC_DISPATCH_GROUP_STALL:
36 case Scheduler::SC_AVAILABLE:
44 if (Scheduler::Status S = HWS.isAvailable(IR)) {
127 // was stalled due to unavailable scheduler resources.
187 assert(isAvailable(IR) && "Scheduler is not available!")
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  /src/external/apache2/llvm/lib/libLLVMMCA/
Makefile 25 Scheduler.cpp
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
PostRASchedulerList.cpp 1 //===----- SchedulePostRAList.cpp - list scheduler ------------------------===//
9 // This implements a top-down list scheduler, using standard algorithms.
56 EnablePostRAScheduler("post-RA-scheduler",
161 /// Initialize the scheduler state for the next scheduling region.
167 /// Notify that the scheduler has finished scheduling the current region.
202 "Post RA top-down list latency scheduler", false, false)
312 SchedulePostRATDList Scheduler(Fn, MLI, AA, RegClassInfo, AntiDepMode,
329 Scheduler.startBlock(&MBB);
342 Scheduler.enterRegion(&MBB, I, Current, CurrentCount - Count);
343 Scheduler.setEndIndex(CurrentCount)
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MachineScheduler.cpp 1 //===- MachineScheduler.cpp - Machine Instruction Scheduler ---------------===//
75 #define DEBUG_TYPE "machine-scheduler"
164 /// Base class for a machine scheduler class that can run at any point.
173 void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
213 "Machine Instruction Scheduler", false, false)
220 "Machine Instruction Scheduler", false, false)
244 "PostRA Machine Instruction Scheduler", false, false)
249 "PostRA Machine Instruction Scheduler", false, false)
267 /// A dummy default scheduler factory indicates whether the scheduler
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  /src/external/apache2/llvm/dist/llvm/lib/MCA/
Context.cpp 20 #include "llvm/MCA/HardwareUnits/Scheduler.h"
43 auto HWS = std::make_unique<Scheduler>(SM, *LSU);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIMachineScheduler.cpp 1 //===-- SIMachineScheduler.cpp - SI Scheduler Interface -------------------===//
10 /// SI Machine Scheduler interface
22 #define DEBUG_TYPE "machine-scheduler"
24 // This scheduler implements a different scheduling algorithm than
38 // have few dependencies) makes the generic scheduler have some unpredictable
57 // This scheduler tries to solve the scheduling problem by dividing it into
485 dbgs() << "Data Structure Bug in SI Scheduler\n";
1321 // is by far the most expensive operation of the Scheduler.
1349 // is the most cpu intensive operation of the scheduler.
1756 SIScheduleBlockScheduler Scheduler(DAG, ScheduleVariant, Blocks)
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  /src/usr.bin/telnet/
externs.h 295 int Scheduler(int);
telnet.c 1989 * Scheduler()
1999 Scheduler(int block) /* should we block in the select ? */
2092 while ((schedValue = Scheduler(0)) != 0) {
2099 if (Scheduler(1) == -1) {
  /src/external/gpl3/gcc.old/dist/libphobos/src/std/
concurrency.d 33 * $(TR $(TD Scheduler) $(TD
36 * $(MYREF Scheduler)
37 * $(MYREF scheduler)
62 * by the Scheduler selected at initialization time. The default behavior is
260 if (scheduler is null)
262 return scheduler.thisInfo;
616 if (scheduler !is null)
617 scheduler.spawn(&exec);
1199 * When defining a Scheduler, an instance of this struct must be associated
1214 * Scheduler
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGISel.cpp 202 defaultListDAGScheduler("default", "Best scheduler for the target",
251 /// createDefaultScheduler - This creates an instruction scheduler appropriate
258 // Try first to see if the Target has its own way of selecting a scheduler
975 CurDAG->viewGraph("scheduler input for " + BlockName);
978 ScheduleDAGSDNodes *Scheduler = CreateScheduler();
982 Scheduler->Run(CurDAG, FuncInfo->MBB);
986 Scheduler->viewGraph();
997 LastMBB = FuncInfo->MBB = Scheduler->EmitSchedule(FuncInfo->InsertPt);
1005 // Free the scheduler state.
1009 delete Scheduler;
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