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    Searched refs:Setcc (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 509 bool tryVPTESTM(SDNode *Root, SDValue Setcc, SDValue Mask);
532 Opcode == X86ISD::STRICT_CMPM || Opcode == ISD::SETCC ||
2979 case X86ISD::SETCC: CCOpNo = 0; break;
4358 bool X86DAGToDAGISel::tryVPTESTM(SDNode *Root, SDValue Setcc,
4361 assert(Setcc.getSimpleValueType().getVectorElementType() == MVT::i1 &&
4365 ISD::CondCode CC = cast<CondCodeSDNode>(Setcc.getOperand(2))->get();
4369 SDValue SetccOp0 = Setcc.getOperand(0);
4370 SDValue SetccOp1 = Setcc.getOperand(1);
4457 MVT ResVT = Setcc.getSimpleValueType();
4819 if (N0.getOpcode() == ISD::SETCC && N0.hasOneUse() &
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X86ISelLowering.cpp 123 // X86 is weird. It always uses i8 for shift amounts and setcc results.
451 setOperationAction(ISD::SETCC, VT, Custom);
459 setOperationAction(ISD::SETCC, VT, Custom);
776 setOperationAction(ISD::SETCC, MVT::f128, Custom);
846 setOperationAction(ISD::SETCC, VT, Expand);
975 setOperationAction(ISD::SETCC, VT, Custom);
982 // setcc all the way to isel and prefer SETGT in some isel patterns.
1311 setOperationAction(ISD::SETCC, VT, Custom);
1318 // setcc all the way to isel and prefer SETGT in some isel patterns.
1491 setOperationAction(ISD::SETCC, VT, Custom)
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 887 // Return true if this node is a setcc, or is a select_cc
889 // equivalent to a setcc. Also, set the incoming LHS, RHS, and CC references to
894 if (N.getOpcode() == ISD::SETCC) {
925 /// Return true if this is a SetCC-equivalent operation with only one use.
1667 case ISD::SETCC: return visitSETCC(N);
2182 // Match the zext operand as a setcc of a boolean.
2183 if (Z.getOperand(0).getOpcode() != ISD::SETCC ||
2187 // Match the compare as: setcc (X & 1), 0, eq.
2188 SDValue SetCC = Z.getOperand(0);
2189 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get()
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