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    Searched refs:Shuffles (Results 1 - 9 of 9) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
InterleavedAccessPass.cpp 32 // specific loads followed by an optimized sequence of shuffles.
43 // sequence of shuffles followed by a set of target specific stores for X86.
118 /// shufflevector instructions in \p Shuffles instead. If so, the necessary
121 ArrayRef<ShuffleVectorInst *> Shuffles);
123 /// Given a number of shuffles of the form shuffle(binop(x,y)), convert them
125 /// interleaving load. Any newly created shuffles that operate on \p LI will
126 /// be added to \p Shuffles. Returns true, if any changes to the IR have been
129 SmallVectorImpl<ShuffleVectorInst *> &Shuffles,
301 SmallVector<ShuffleVectorInst *, 4> Shuffles;
324 Shuffles.push_back(SVI)
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  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86InterleavedAccess.cpp 55 ArrayRef<ShuffleVectorInst *> Shuffles;
114 : Inst(I), Shuffles(Shuffs), Indices(Ind), Factor(F), Subtarget(STarget),
129 VectorType *ShuffleVecTy = Shuffles[0]->getType();
148 WideInstSize = DL.getTypeSizeInBits(Shuffles[0]->getType());
184 // Generate N(= NumSubVectors) shuffles of T(= SubVecTy) type.
256 // In this function we are combining two types of shuffles.
260 // shuffles.
562 MVT VT = MVT::getVT(Shuffles[0]->getType());
724 auto *ShuffleTy = cast<FixedVectorType>(Shuffles[0]->getType());
757 for (unsigned i = 0, e = Shuffles.size(); i < e; ++i
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X86ISelLowering.h 1415 ArrayRef<ShuffleVectorInst *> Shuffles,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.h 178 // Vector shuffles
588 ArrayRef<ShuffleVectorInst *> Shuffles,
AArch64ISelLowering.cpp 8471 // For now we don't support shuffles that use the second operand
9009 // Convert shuffles that are directly supported on NEON to target-specific
9010 // DAG nodes, instead of keeping them as shuffles and matching them again
9147 // the PerfectShuffle-generated table to synthesize it from other shuffles.
10249 // Currently no fixed length shuffles that require SVE are legal.
11327 LoadInst *LI, ArrayRef<ShuffleVectorInst *> Shuffles,
11331 assert(!Shuffles.empty() && "Empty shufflevector input");
11332 assert(Shuffles.size() == Indices.size() &&
11337 VectorType *VTy = Shuffles[0]->getType();
11400 for (unsigned i = 0; i < Shuffles.size(); i++)
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  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.h 197 // Vector shuffles:
282 // is fine if BUILD_VECTORs are always lowered to shuffles or other
643 ArrayRef<ShuffleVectorInst *> Shuffles,
ARMISelLowering.cpp 6967 // We can handle <8 x i8> vector shuffles. If the index in the mask is out of
7651 // Reconstruct the BUILDVECTOR to one of the legal shuffles (such as vext and
7760 // Furthermore, shuffles require a constant mask, whereas extractelts
8341 // Convert shuffles that are directly supported on NEON to target-specific
8342 // DAG nodes, instead of keeping them as shuffles and matching them again
8398 // Check for Neon shuffles that modify both input vectors in place.
8399 // If both results are used, i.e., if there are two shuffles with the same
8402 // used for both shuffles.
8426 // Also check for these shuffles through CONCAT_VECTORS: we canonicalize
8427 // shuffles that produce a result larger than their operands with
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 4891 // If both shuffles use the same mask, and both shuffle within a single
4897 // is profitable even if shuffles don't perform a swizzle.
4898 // If both shuffles use the same mask, and both shuffles have the same first
4905 "Inputs to shuffles are not the same type");
4907 // Check that both shuffles use the same mask. The masks are known to be of
4909 // Check also that shuffles have only one use to avoid introducing extra
6384 // Ensure both shuffles have a zero input.
6420 // which operand it came from in the original shuffles.
12632 // Remove double bitcasts from shuffles - this is often a legacy o
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  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
TargetLowering.h 454 // the constraint that all of the necessary shuffles are legal (as determined
2628 /// \p Shuffles is the shufflevector list to DE-interleave the loaded vector.
2632 ArrayRef<ShuffleVectorInst *> Shuffles,

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