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    Searched refs:SignedOffset (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
AMDGPUMCTargetDesc.cpp 131 APInt SignedOffset(18, Imm * 4, true);
132 Target = (SignedOffset.sext(64) + Addr + Size).getZExtValue();
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/
DwarfExpression.cpp 327 int SignedOffset = 0;
336 SignedOffset = Offset;
349 SignedOffset = Offset;
353 SignedOffset = -static_cast<int64_t>(Offset);
359 addFBReg(SignedOffset);
361 addBReg(Reg.DwarfRegNo, SignedOffset);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsInstructionSelector.cpp 444 int64_t SignedOffset = 0;
446 // %SignedOffset:(s32) = G_CONSTANT i32 16_bit_signed_immediate
447 // %Addr:(p0) = G_PTR_ADD %BaseAddr, %SignedOffset
459 SignedOffset = OffsetValue.getSExtValue();
471 if (!buildUnalignedStore(I, Mips::SWL, BaseAddr, SignedOffset + 3, MMO))
473 if (!buildUnalignedStore(I, Mips::SWR, BaseAddr, SignedOffset, MMO))
484 if (!buildUnalignedLoad(I, Mips::LWL, Tmp, BaseAddr, SignedOffset + 3,
488 BaseAddr, SignedOffset, Tmp, MMO))
504 .addImm(SignedOffset)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 77 APInt SignedOffset(18, Imm * 4, true);
78 int64_t Offset = (SignedOffset.sext(64) + 4 + Addr).getSExtValue();

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