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    Searched refs:Src0Idx (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp 2070 unsigned Src0Idx,
2080 static_cast<int>(Src0Idx) &&
2085 MachineOperand &Src0 = MI.getOperand(Src0Idx);
2093 = TargetInstrInfo::commuteInstructionImpl(MI, NewMI, Src0Idx, Src1Idx);
2133 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
2134 if (Src0Idx == -1)
2141 return fixCommutedOpIndices(SrcOpIdx0, SrcOpIdx1, Src0Idx, Src1Idx);
3071 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
3073 const MachineOperand *Src0 = &MI.getOperand(Src0Idx);
3077 if (Src0->isImm() && !isInlineConstant(MI, Src0Idx, *Src0)
    [all...]
SIShrinkInstructions.cpp 66 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0);
69 MachineOperand &Src0 = MI.getOperand(Src0Idx);
78 if (TII->isOperandLegal(MI, Src0Idx, &MovSrc)) {
SIFoldOperands.cpp 1053 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
1054 if (Src0Idx == -1)
1056 MachineOperand *Src0 = getImmOrMaterializedImm(MRI, MI->getOperand(Src0Idx));
1087 MI->getOperand(Src0Idx).ChangeToImmediate(NewImm);
1098 std::swap(Src0Idx, Src1Idx);
1124 MI->RemoveOperand(Src0Idx);
SIFixSGPRCopies.cpp 716 int Src0Idx =
720 MachineOperand &Src0 = MI.getOperand(Src0Idx);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 3259 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
3263 const int OpIndices[] = { Src0Idx, Src1Idx, Src2Idx };
3335 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
3344 const int SrcIndices[] = { Src0Idx, Src1Idx, Src2Idx };
3540 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
3541 assert(Src0Idx != -1);
3544 const MCOperand &Src0 = Inst.getOperand(Src0Idx);
3567 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
3568 assert(Src0Idx != -1);
3570 const MCOperand &Src0 = Inst.getOperand(Src0Idx);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
AMDGPUInstPrinter.cpp 811 int Src0Idx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
814 if (Src0Idx >= 0 &&
815 Desc.OpInfo[Src0Idx].RegClass == AMDGPU::VReg_64RegClassID &&

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