HomeSort by: relevance | last modified time | path
    Searched refs:SuccSU (Results 1 - 12 of 12) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGVLIW.cpp 114 SUnit *SuccSU = D.getSUnit();
117 if (SuccSU->NumPredsLeft == 0) {
119 dumpNode(*SuccSU);
126 --SuccSU->NumPredsLeft;
128 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency());
132 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) {
133 PendingQueue.push_back(SuccSU);
ScheduleDAGRRList.cpp 1201 SUnit *SuccSU = Succ.getSUnit();
1202 if (SuccSU->isScheduled) {
1205 AddPredQueued(SuccSU, D);
1207 DelDeps.push_back(std::make_pair(SuccSU, D));
1240 SUnit *SuccSU = Succ.getSUnit();
1241 if (SuccSU->isScheduled) {
1244 AddPredQueued(SuccSU, D);
1245 DelDeps.push_back(std::make_pair(SuccSU, Succ));
1251 AddPredQueued(SuccSU, SDep(CopyFromSU, SDep::Artificial));
2385 const SUnit *SuccSU = Succ.getSUnit()
    [all...]
ScheduleDAGFast.cpp 362 SUnit *SuccSU = Succ.getSUnit();
363 if (SuccSU->isScheduled) {
366 AddPred(SuccSU, D);
368 DelDeps.push_back(std::make_pair(SuccSU, D));
398 SUnit *SuccSU = Succ.getSUnit();
399 if (SuccSU->isScheduled) {
402 AddPred(SuccSU, D);
403 DelDeps.push_back(std::make_pair(SuccSU, Succ));
ResourcePriorityQueue.cpp 115 SUnit *SuccSU = Succ.getSUnit();
116 const SDNode *ScegN = SuccSU->getNode();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
GCNMinRegStrategy.cpp 215 auto SuccSU = S.getSUnit();
218 assert(SuccSU->isBoundaryNode() || getNumPreds(SuccSU) > 0);
219 if (!SuccSU->isBoundaryNode() && decNumPreds(SuccSU) == 0)
220 RQ.push_front(*new (Alloc.Allocate()) Candidate(SuccSU, Priority));
SIMachineScheduler.cpp 435 SUnit *SuccSU = SuccEdge->getSUnit();
438 ++SuccSU->WeakPredsLeft;
441 ++SuccSU->NumPredsLeft;
445 SUnit *SuccSU = SuccEdge->getSUnit();
448 --SuccSU->WeakPredsLeft;
452 if (SuccSU->NumPredsLeft == 0) {
454 DAG->dumpNode(*SuccSU);
460 --SuccSU->NumPredsLeft;
466 SUnit *SuccSU = Succ.getSUnit();
468 if (SuccSU->NodeNum >= DAG->SUnits.size()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
PostRASchedulerList.cpp 453 SUnit *SuccSU = SuccEdge->getSUnit();
456 --SuccSU->WeakPredsLeft;
460 if (SuccSU->NumPredsLeft == 0) {
462 dumpNode(*SuccSU);
467 --SuccSU->NumPredsLeft;
471 // SuccSU->setDepthToAtLeast(SU->getDepth() + SuccEdge->getLatency());
482 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU)
483 PendingQueue.push_back(SuccSU);
ScheduleDAG.cpp 225 SUnit *SuccSU = SuccDep.getSUnit();
226 if (SuccSU->isDepthCurrent)
227 WorkList.push_back(SuccSU);
304 SUnit *SuccSU = SuccDep.getSUnit();
305 if (SuccSU->isHeightCurrent)
307 SuccSU->Height + SuccDep.getLatency());
310 WorkList.push_back(SuccSU);
ScheduleDAGInstrs.cpp 1203 bool ScheduleDAGInstrs::canAddEdge(SUnit *SuccSU, SUnit *PredSU) {
1204 return SuccSU == &ExitSU || !Topo.IsReachable(PredSU, SuccSU);
1207 bool ScheduleDAGInstrs::addEdge(SUnit *SuccSU, const SDep &PredDep) {
1208 if (SuccSU != &ExitSU) {
1211 if (Topo.IsReachable(PredDep.getSUnit(), SuccSU))
1213 Topo.AddPredQueued(SuccSU, PredDep.getSUnit());
1215 SuccSU->addPred(PredDep, /*Required=*/!PredDep.isArtificial());
1232 /// List PredSU, SuccSU pairs that represent data edges between subtrees.
MachinePipeliner.cpp 693 SUnit *SuccSU = SI.getSUnit();
695 if (Visited.count(SuccSU))
697 if (SuccSU == SUb)
699 Worklist.push_back(SuccSU);
700 Visited.insert(SuccSU);
2447 SUnit *SuccSU = Cur.getSUnit();
2448 if (Visited.count(SuccSU))
2450 std::map<SUnit *, int>::const_iterator it = InstrToCycle.find(SuccSU);
2454 for (const auto &SI : SuccSU->Succs)
2457 Visited.insert(SuccSU);
    [all...]
MachineScheduler.cpp 636 /// FIXME: Adjust SuccSU height based on MinLatency.
638 SUnit *SuccSU = SuccEdge->getSUnit();
641 --SuccSU->WeakPredsLeft;
643 NextClusterSucc = SuccSU;
647 if (SuccSU->NumPredsLeft == 0) {
649 dumpNode(*SuccSU);
656 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency())
657 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency();
659 --SuccSU->NumPredsLeft;
660 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ScheduleDAGInstrs.h 352 /// True if an edge can be added from PredSU to SuccSU without creating
354 bool canAddEdge(SUnit *SuccSU, SUnit *PredSU);
361 bool addEdge(SUnit *SuccSU, const SDep &PredDep);

Completed in 25 milliseconds