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    Searched refs:TCSR_EXT_EN (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/evbmips/ingenic/
clock.c	103 writereg(JZ_TC_TCSR(5), TCSR_EXT_EN| TCSR_DIV_16);
/src/sys/arch/mips/ingenic/
ingenic_regs.h	54 #define TCSR_EXT_EN 0x04 /* EXTCLK - 48MHz */

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