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    Searched refs:TDV_CVG_CLK (Results 1 - 2 of 2) sorted by relevancy

/src/sys/dev/pci/
tdvfbreg.h	37 #define TDV_CVG_CLK 75000 /* 75MHz, max is around 90MHz */
tdvfb.c	551 sc->cvg_timing = tdvfb_gendac_calc_pll(TDV_CVG_CLK);

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