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    Searched refs:TDV_SST_CLK (Results 1 - 2 of 2) sorted by relevancy

/src/sys/dev/pci/
tdvfbreg.h	36 #define TDV_SST_CLK 50000 /* 50MHz, max is around 60MHz */
tdvfb.c	553 sc->cvg_timing = tdvfb_gendac_calc_pll(TDV_SST_CLK);

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