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    Searched refs:TEGRA186_CLK_PLLP_OUT0 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
tegra186-clock.h 188 * @def TEGRA186_CLK_PLLP_OUT0
750 #define TEGRA186_CLK_PLLP_OUT0 269
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/
tegra186.dtsi 653 <&bpmp TEGRA186_CLK_PLLP_OUT0>;
654 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>;
1618 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,

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