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    Searched refs:TEGRA186_CLK_PLL_A_OUT0 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
tegra186-clock.h 95 * @def TEGRA186_CLK_PLL_A_OUT0
714 #define TEGRA186_CLK_PLL_A_OUT0 246
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/
tegra186.dtsi 150 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
210 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
224 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
238 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
252 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
266 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
280 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
292 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
304 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
316 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
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