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Searched refs:TEGRA20_CLK_PLL_A (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
tegra20-car.h	`137 #define TEGRA20_CLK_PLL_A 112`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
tegra20-plutux.dts	`57 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-tec.dts	`66 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-medcom-wide.dts	`89 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-trimslice.dts	`452 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-colibri.dtsi	`738 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-harmony.dts	`757 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-paz00.dts	`655 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-ventana.dts	`718 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-seaboard.dts	`916 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`
tegra20-acer-a500-picasso.dts	`1025 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,`

Completed in 17 milliseconds