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Searched refs:TEGRA20_CLK_PLL_A_OUT0 (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
tegra20-car.h	`138 #define TEGRA20_CLK_PLL_A_OUT0 113`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
tegra20-plutux.dts	`58 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-tec.dts	`67 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-medcom-wide.dts	`90 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-trimslice.dts	`453 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-colibri.dtsi	`739 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-harmony.dts	`758 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-paz00.dts	`656 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-ventana.dts	`719 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-seaboard.dts	`917 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`
tegra20-acer-a500-picasso.dts	`1026 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,`

Completed in 15 milliseconds