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    Searched refs:TFR_FFLAG5 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/evbmips/ingenic/
clock.c	104 writereg(JZ_TC_TMCR, TFR_FFLAG5); 105 writereg(JZ_TC_TFCR, TFR_FFLAG5); 224 writereg(JZ_TC_TFCR, TFR_FFLAG5);
/src/sys/arch/mips/ingenic/
ingenic_regs.h	82 #define TFR_FFLAG5 0x00000020 /* channel 5 */

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