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    Searched refs:TMR_GBL_CTL_INT_ENABLE (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/cortex/
a9tmr_reg.h	89 #define TMR_GBL_CTL_INT_ENABLE __BIT(2) // [banked] INT 27 is enabled
a9tmr.c	211 ctl |= TMR_GBL_CTL_CMP_ENABLE | TMR_GBL_CTL_INT_ENABLE |

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