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  /src/sys/arch/arm/cortex/
a9tmr_reg.h 59 #define TMR_INT 0x000C // Timer Interrupt Status
a9ptmr.c 240 a9ptmr_write(sc, TMR_INT, TMR_INT_EVENT);
264 a9ptmr_write(sc, TMR_INT, TMR_INT_EVENT);

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