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    Searched refs:TN_RLC_CLEAR_STATE_RESTORE_BASE (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
evergreend.h	409 #define TN_RLC_CLEAR_STATE_RESTORE_BASE 0x3f20
radeon_evergreen.c	4418 WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);

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