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    Searched refs:TPReg (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/
RISCVMCCodeEmitter.cpp 158 MCOperand TPReg = MI.getOperand(2);
159 assert(TPReg.isReg() && TPReg.getReg() == RISCV::X4 &&
185 .addOperand(TPReg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 2567 SDValue TPReg = DAG.getRegister(RISCV::X4, XLenVT);
2568 return DAG.getNode(ISD::ADD, DL, Ty, Load, TPReg);
2583 SDValue TPReg = DAG.getRegister(RISCV::X4, XLenVT);
2585 DAG.getMachineNode(RISCV::PseudoAddTPRel, DL, Ty, MNHi, TPReg, AddrAdd),

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