| /src/sys/arch/atari/atari/ |
| vectors.s | 79 VECTOR(illinst) | 33: TRAP instruction vector
87 VECTOR(illinst) | 36: TRAP instruction vector
88 VECTOR(illinst) | 37: TRAP instruction vector
89 VECTOR(illinst) | 38: TRAP instruction vector
90 VECTOR(illinst) | 39: TRAP instruction vector
91 VECTOR(illinst) | 40: TRAP instruction vector
92 VECTOR(illinst) | 41: TRAP instruction vector
93 VECTOR(illinst) | 42: TRAP instruction vector
94 VECTOR(illinst) | 43: TRAP instruction vector
95 VECTOR(trap12) | 44: TRAP instruction vecto
[all...] |
| /src/sys/arch/x86/include/ |
| db_machdep.h | 9 #define TRAP 1
|
| /src/sys/arch/i386/i386/ |
| i386_trap.S | 73 * Trap and fault vector routines
83 #define TRAP(a) pushl $(a) ; jmp _C_LABEL(alltraps)
84 #define ZTRAP(a) pushl $0 ; TRAP(a)
152 call _C_LABEL(trap)
184 /* If so, just handle it as a normal trap. */
228 TRAP(T_DOUBLEFLT)
236 TRAP(T_TSSFLT)
240 TRAP(T_SEGNPFLT)
244 TRAP(T_STKFLT)
248 TRAP(T_PROTFLT
[all...] |
| db_machdep.c | 41 #include <machine/trap.h>
116 * For trap(), we print the address of the faulting instruction and
118 * If the trap was caused by jumping through a bogus pointer, then
160 (*pr)("--- trap via task gate ---\n");
163 case TRAP:
168 /* The only argument to trap() or syscall() is the trapframe. */
170 case TRAP:
173 (*pr)("--- trap (number %d) ---\n", tf.tf_trapno);
272 * locations rather than on trap, since some traps
273 * (e.g., npxdna) don't go through trap()
[all...] |
| /src/games/rogue/ |
| trap.c | 1 /* $NetBSD: trap.c,v 1.10 2009/08/12 08:44:45 dholland Exp $ */
38 static char sccsid[] = "@(#)trap.c 8.1 (Berkeley) 5/31/93";
40 __RCSID("$NetBSD: trap.c,v 1.10 2009/08/12 08:44:45 dholland Exp $");
45 * trap.c
58 trap traps[MAX_TRAPS];
63 "trap door",
64 "you fell down a trap",
65 "bear trap",
66 "you are caught in a bear trap",
67 "teleport trap",
[all...] |
| move.c | 94 messagef(0, "you are still stuck in the bear trap");
167 if (dungeon[row][col] & (DOOR | STAIRS | TRAP)) {
168 if ((!levitate) && (dungeon[row][col] & TRAP)) {
236 return((dungeon[row][col] & TRAP) ? 1 : 0);
238 return(dungeon[row][col] & (FLOOR | TUNNEL | DOOR | STAIRS | TRAP));
280 if (s & TRAP) {
482 if (dungeon[rogue.row][rogue.col] & TRAP) {
|
| room.c | 168 if ((dungeon[i][j] & TRAP) && (!(dungeon[i][j] & HIDDEN))) {
202 if (mask & TRAP) {
375 unsigned short mask = (HORWALL | VERTWALL | DOOR | TUNNEL | TRAP | STAIRS |
384 ((ch >= 'A') && (ch <= 'Z')) || (s & (TRAP | HIDDEN))) {
393 } else if (s & TRAP) {
|
| throw.c | 176 (!(dungeon[*row][*col] & TRAP)))) {
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| micromips-opc.c | 211 #define TRAP INSN_NO_DELAY_SLOT
456 {"break", "", 0x4680, 0xffff, TRAP, 0, I1, 0, 0 },
457 {"break", "", 0x00000007, 0xffffffff, TRAP, 0, I1, 0, 0 },
458 {"break", "mF", 0x4680, 0xfff0, TRAP, 0, I1, 0, 0 },
459 {"break", "c", 0x00000007, 0xfc00ffff, TRAP, 0, I1, 0, 0 },
460 {"break", "c,q", 0x00000007, 0xfc00003f, TRAP, 0, I1, 0, 0 },
566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 },
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips16-opc.c | 187 #define TRAP INSN_NO_DELAY_SLOT
260 {"break", "", 0xe805, 0xffff, TRAP, SH, I1, 0, 0 },
261 {"break", "6", 0xe805, 0xf81f, TRAP, SH, I1, 0, 0 },
316 {"exit", "L", 0xed09, 0xff1f, TRAP, SH, I1, 0, 0 },
317 {"exit", "L", 0xee09, 0xff1f, TRAP, SH, I1, 0, 0 },
318 {"exit", "", 0xef09, 0xffff, TRAP, SH, I1, 0, 0 },
319 {"exit", "L", 0xef09, 0xff1f, TRAP, SH, I1, 0, 0 },
320 {"entry", "", 0xe809, 0xffff, TRAP, SH, I1, 0, 0 },
321 {"entry", "l", 0xe809, 0xf81f, TRAP, SH, I1, 0, 0 },
449 {"sdbbp", "", 0xe801, 0xffff, TRAP, SH, I32, 0, 0 }
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| micromips-opc.c | 211 #define TRAP INSN_NO_DELAY_SLOT
456 {"break", "", 0x4680, 0xffff, TRAP, 0, I1, 0, 0 },
457 {"break", "", 0x00000007, 0xffffffff, TRAP, 0, I1, 0, 0 },
458 {"break", "mF", 0x4680, 0xfff0, TRAP, 0, I1, 0, 0 },
459 {"break", "c", 0x00000007, 0xfc00ffff, TRAP, 0, I1, 0, 0 },
460 {"break", "c,q", 0x00000007, 0xfc00003f, TRAP, 0, I1, 0, 0 },
566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 },
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips16-opc.c | 187 #define TRAP INSN_NO_DELAY_SLOT
260 {"break", "", 0xe805, 0xffff, TRAP, SH, I1, 0, 0 },
261 {"break", "6", 0xe805, 0xf81f, TRAP, SH, I1, 0, 0 },
316 {"exit", "L", 0xed09, 0xff1f, TRAP, SH, I1, 0, 0 },
317 {"exit", "L", 0xee09, 0xff1f, TRAP, SH, I1, 0, 0 },
318 {"exit", "", 0xef09, 0xffff, TRAP, SH, I1, 0, 0 },
319 {"exit", "L", 0xef09, 0xff1f, TRAP, SH, I1, 0, 0 },
320 {"entry", "", 0xe809, 0xffff, TRAP, SH, I1, 0, 0 },
321 {"entry", "l", 0xe809, 0xf81f, TRAP, SH, I1, 0, 0 },
449 {"sdbbp", "", 0xe801, 0xffff, TRAP, SH, I32, 0, 0 }
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| micromips-opc.c | 211 #define TRAP INSN_NO_DELAY_SLOT
456 {"break", "", 0x4680, 0xffff, TRAP, 0, I1, 0, 0 },
457 {"break", "", 0x00000007, 0xffffffff, TRAP, 0, I1, 0, 0 },
458 {"break", "mF", 0x4680, 0xfff0, TRAP, 0, I1, 0, 0 },
459 {"break", "c", 0x00000007, 0xfc00ffff, TRAP, 0, I1, 0, 0 },
460 {"break", "c,q", 0x00000007, 0xfc00003f, TRAP, 0, I1, 0, 0 },
566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 },
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips16-opc.c | 187 #define TRAP INSN_NO_DELAY_SLOT
260 {"break", "", 0xe805, 0xffff, TRAP, SH, I1, 0, 0 },
261 {"break", "6", 0xe805, 0xf81f, TRAP, SH, I1, 0, 0 },
316 {"exit", "L", 0xed09, 0xff1f, TRAP, SH, I1, 0, 0 },
317 {"exit", "L", 0xee09, 0xff1f, TRAP, SH, I1, 0, 0 },
318 {"exit", "", 0xef09, 0xffff, TRAP, SH, I1, 0, 0 },
319 {"exit", "L", 0xef09, 0xff1f, TRAP, SH, I1, 0, 0 },
320 {"entry", "", 0xe809, 0xffff, TRAP, SH, I1, 0, 0 },
321 {"entry", "l", 0xe809, 0xf81f, TRAP, SH, I1, 0, 0 },
449 {"sdbbp", "", 0xe801, 0xffff, TRAP, SH, I32, 0, 0 }
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| micromips-opc.c | 211 #define TRAP INSN_NO_DELAY_SLOT
456 {"break", "", 0x4680, 0xffff, TRAP, 0, I1, 0, 0 },
457 {"break", "", 0x00000007, 0xffffffff, TRAP, 0, I1, 0, 0 },
458 {"break", "mF", 0x4680, 0xfff0, TRAP, 0, I1, 0, 0 },
459 {"break", "c", 0x00000007, 0xfc00ffff, TRAP, 0, I1, 0, 0 },
460 {"break", "c,q", 0x00000007, 0xfc00003f, TRAP, 0, I1, 0, 0 },
566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 },
568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 },
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips16-opc.c | 187 #define TRAP INSN_NO_DELAY_SLOT
260 {"break", "", 0xe805, 0xffff, TRAP, SH, I1, 0, 0 },
261 {"break", "6", 0xe805, 0xf81f, TRAP, SH, I1, 0, 0 },
316 {"exit", "L", 0xed09, 0xff1f, TRAP, SH, I1, 0, 0 },
317 {"exit", "L", 0xee09, 0xff1f, TRAP, SH, I1, 0, 0 },
318 {"exit", "", 0xef09, 0xffff, TRAP, SH, I1, 0, 0 },
319 {"exit", "L", 0xef09, 0xff1f, TRAP, SH, I1, 0, 0 },
320 {"entry", "", 0xe809, 0xffff, TRAP, SH, I1, 0, 0 },
321 {"entry", "l", 0xe809, 0xf81f, TRAP, SH, I1, 0, 0 },
449 {"sdbbp", "", 0xe801, 0xffff, TRAP, SH, I32, 0, 0 }
[all...] |
| /src/sys/arch/amd64/amd64/ |
| db_machdep.c | 37 #include <machine/trap.h>
99 * For trap(), we print the address of the faulting instruction and
101 * If the trap was caused by jumping through a bogus pointer, then
144 case TRAP:
148 /* The only argument to trap() is the trapframe. */
151 case TRAP:
152 (*pr)("--- trap (number %"DDB_EXPR_FMT"u) ---\n",
228 * locations rather than on trap, since some traps
229 * (e.g., npxdna) don't go through trap()
231 if (!strcmp(name, "trap")) {
[all...] |
| amd64_trap.S | 76 #include <machine/trap.h>
82 * Trap and fault vector routines
104 #define TRAP(a) TRAP_NJ(a) ; TRAPENTRY
363 TRAP(T_DOUBLEFLT)
407 TRAP(T_TSSFLT)
435 TRAP(T_PAGEFLT)
453 * interrupted just before the CLI in the trap macro.
468 TRAP(T_ALIGNFLT)
527 * It is possible that we received a trap in kernel mode, but with the user
562 * everything behaves as if we had received a trap from the outer frame
[all...] |
| /src/external/gpl3/gcc/dist/libgcc/config/mmix/ |
| crti.S | 126 % (TRAP Halt) if that happens.
134 TRAP 0,0,0
151 TRAP 0,0,0
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/mmix/ |
| crti.S | 126 % (TRAP Halt) if that happens.
134 TRAP 0,0,0
151 TRAP 0,0,0
|
| /src/sys/arch/epoc32/stand/e32boot/exe/ |
| e32boot.cpp | 166 TRAP(err, netbsd = LoadNetBSDL());
293 TRAP(err, netbsd = NetBSD::New(input, *args));
295 TRAP(err, netbsd = NetBSD::New(Default, *args));
|
| /src/sys/arch/sparc/sparc/ |
| locore.s | 73 #include <machine/trap.h>
119 * To return from trap we need the two-instruction sequence
130 * trap-frame setup code, since we may need to switch from the kernel
250 * The first thing in the real text segment is the trap vector table,
265 * Each trap has room for four instructions, of which one perforce must
268 * put the trap type value into %l3 (with a few exceptions below).
269 * We could read the trap type field of %tbr later in the code instead,
276 * trap numbers are given as arguments to the trap macros. This means
277 * there is one line per trap. Sigh
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 1077 /// TRAP - Trapping instruction
1078 TRAP,
1080 /// DEBUGTRAP - Trap intended to get the attention of a debugger.
1083 /// UBSANTRAP - Trap with an immediate describing the kind of sanitizer
|
| /src/external/bsd/tcpdump/dist/ |
| print-snmp.c | 141 "Trap",
142 #define TRAP 4
153 #define NOTIFY_CLASS(x) (x == TRAP || x == V2TRAP || x == INFORMREQ)
209 * generic-trap values in the SNMP Trap-PDU
1191 * PDUs for all but Trap: (see rfc1157 from page 15 on)
1202 * PDU for Trap:
1206 * generic-trap INTEGER,
1207 * specific-trap INTEGER,
1391 * Decode SNMP Trap PD
[all...] |
| /src/sys/arch/sparc64/sparc64/ |
| locore.s | 63 #define HWREF /* Track ref/mod bits in trap handlers */
84 #include <machine/trap.h>
288 * romtba is the prom trap table base address
302 * The v9 trap frame is stored in the special trap registers. The
315 * trap numbers are given as arguments to the trap macros. This means
316 * there is one line per trap. Sigh.
328 * TA8 -- trap align for 8 instruction traps
329 * TA32 -- trap align for 32 instruction trap
[all...] |
