/src/sys/arch/x86/include/ |
db_machdep.h | 9 #define TRAP 1
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/src/sys/arch/atari/atari/ |
vectors.s | 79 VECTOR(illinst) | 33: TRAP instruction vector 87 VECTOR(illinst) | 36: TRAP instruction vector 88 VECTOR(illinst) | 37: TRAP instruction vector 89 VECTOR(illinst) | 38: TRAP instruction vector 90 VECTOR(illinst) | 39: TRAP instruction vector 91 VECTOR(illinst) | 40: TRAP instruction vector 92 VECTOR(illinst) | 41: TRAP instruction vector 93 VECTOR(illinst) | 42: TRAP instruction vector 94 VECTOR(illinst) | 43: TRAP instruction vector 95 VECTOR(trap12) | 44: TRAP instruction vecto [all...] |
/src/sys/arch/i386/i386/ |
i386_trap.S | 73 * Trap and fault vector routines 83 #define TRAP(a) pushl $(a) ; jmp _C_LABEL(alltraps) 84 #define ZTRAP(a) pushl $0 ; TRAP(a) 152 call _C_LABEL(trap) 184 /* If so, just handle it as a normal trap. */ 227 TRAP(T_DOUBLEFLT) 235 TRAP(T_TSSFLT) 239 TRAP(T_SEGNPFLT) 243 TRAP(T_STKFLT) 247 TRAP(T_PROTFLT [all...] |
db_machdep.c | 41 #include <machine/trap.h> 116 * For trap(), we print the address of the faulting instruction and 118 * If the trap was caused by jumping through a bogus pointer, then 160 (*pr)("--- trap via task gate ---\n"); 163 case TRAP: 168 /* The only argument to trap() or syscall() is the trapframe. */ 170 case TRAP: 173 (*pr)("--- trap (number %d) ---\n", tf.tf_trapno); 272 * locations rather than on trap, since some traps 273 * (e.g., npxdna) don't go through trap() [all...] |
/src/games/rogue/ |
trap.c | 1 /* $NetBSD: trap.c,v 1.10 2009/08/12 08:44:45 dholland Exp $ */ 38 static char sccsid[] = "@(#)trap.c 8.1 (Berkeley) 5/31/93"; 40 __RCSID("$NetBSD: trap.c,v 1.10 2009/08/12 08:44:45 dholland Exp $"); 45 * trap.c 58 trap traps[MAX_TRAPS]; 63 "trap door", 64 "you fell down a trap", 65 "bear trap", 66 "you are caught in a bear trap", 67 "teleport trap", [all...] |
move.c | 94 messagef(0, "you are still stuck in the bear trap"); 167 if (dungeon[row][col] & (DOOR | STAIRS | TRAP)) { 168 if ((!levitate) && (dungeon[row][col] & TRAP)) { 236 return((dungeon[row][col] & TRAP) ? 1 : 0); 238 return(dungeon[row][col] & (FLOOR | TUNNEL | DOOR | STAIRS | TRAP)); 280 if (s & TRAP) { 482 if (dungeon[rogue.row][rogue.col] & TRAP) {
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room.c | 168 if ((dungeon[i][j] & TRAP) && (!(dungeon[i][j] & HIDDEN))) { 202 if (mask & TRAP) { 375 unsigned short mask = (HORWALL | VERTWALL | DOOR | TUNNEL | TRAP | STAIRS | 384 ((ch >= 'A') && (ch <= 'Z')) || (s & (TRAP | HIDDEN))) { 393 } else if (s & TRAP) {
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throw.c | 176 (!(dungeon[*row][*col] & TRAP)))) {
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pack.c | 158 if (dungeon[rogue.row][rogue.col] & (OBJECT | STAIRS | TRAP)) {
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spec_hit.c | 296 if ((!(dungeon[row][col] & (OBJECT | STAIRS | TRAP))) &&
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rogue.h | 59 #define TRAP ((unsigned short) 0400) 337 typedef struct tr trap; typedef in typeref:struct:tr 341 extern trap traps[];
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/src/sys/arch/amd64/amd64/ |
db_machdep.c | 37 #include <machine/trap.h> 99 * For trap(), we print the address of the faulting instruction and 101 * If the trap was caused by jumping through a bogus pointer, then 144 case TRAP: 148 /* The only argument to trap() is the trapframe. */ 151 case TRAP: 152 (*pr)("--- trap (number %"DDB_EXPR_FMT"u) ---\n", 228 * locations rather than on trap, since some traps 229 * (e.g., npxdna) don't go through trap() 231 if (!strcmp(name, "trap")) { [all...] |
amd64_trap.S | 76 #include <machine/trap.h> 82 * Trap and fault vector routines 104 #define TRAP(a) TRAP_NJ(a) ; TRAPENTRY 363 TRAP(T_DOUBLEFLT) 407 TRAP(T_TSSFLT) 435 TRAP(T_PAGEFLT) 453 * interrupted just before the CLI in the trap macro. 468 TRAP(T_ALIGNFLT) 527 * It is possible that we received a trap in kernel mode, but with the user 562 * everything behaves as if we had received a trap from the outer frame [all...] |
/src/sys/arch/epoc32/stand/e32boot/exe/ |
e32boot.cpp | 166 TRAP(err, netbsd = LoadNetBSDL()); 293 TRAP(err, netbsd = NetBSD::New(input, *args)); 295 TRAP(err, netbsd = NetBSD::New(Default, *args));
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/src/sys/arch/sparc/sparc/ |
locore.s | 73 #include <machine/trap.h> 119 * To return from trap we need the two-instruction sequence 130 * trap-frame setup code, since we may need to switch from the kernel 250 * The first thing in the real text segment is the trap vector table, 265 * Each trap has room for four instructions, of which one perforce must 268 * put the trap type value into %l3 (with a few exceptions below). 269 * We could read the trap type field of %tbr later in the code instead, 276 * trap numbers are given as arguments to the trap macros. This means 277 * there is one line per trap. Sigh [all...] |
/src/sys/arch/sparc64/sparc64/ |
locore.s | 63 #define HWREF /* Track ref/mod bits in trap handlers */ 84 #include <machine/trap.h> 288 * romtba is the prom trap table base address 302 * The v9 trap frame is stored in the special trap registers. The 315 * trap numbers are given as arguments to the trap macros. This means 316 * there is one line per trap. Sigh. 328 * TA8 -- trap align for 8 instruction traps 329 * TA32 -- trap align for 32 instruction trap [all...] |
/src/sys/arch/hppa/hppa/ |
trap.S | 1 /* $NetBSD: trap.S,v 1.75 2023/07/23 10:09:36 skrll Exp $ */ 105 * #include <hppa/hppa/trap.S> 234 * our callee(s). However, see the longer comment in the trap handling 427 * See the comment in the trap handling code below about why we need to 547 #define TRAP(name,num) \ 558 TRAP(all,num) ! \ 565 TRAP(name,num) ! \ 648 ATRAP(recnt,T_RECOVERY) /* 3. recovery counter trap */ 652 ATRAP(iprot,T_IPROT) /* 7. instruction protection trap */ 653 ATRAP(ill,T_ILLEGAL) /* 8. Illegal instruction trap */ [all...] |
/src/sys/arch/luna68k/dev/xplx/ |
xplx.asm | 688 LD A,00H ; TRAP[7]=0 ITE2[2]=0 ITE1[1]=0 ITE0[0]=0
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/src/sys/arch/m68k/060sp/dist/ |
fpsp.s | 3954 # _real_trap() - "callout" for Trap exception # 3990 # instruction was "ftrapcc" and a Trap exception should result, a Trap # 4290 cmpi.b SPCOND_FLG(%a6),&ftrapcc_flg # should a trap occur? 4293 # FP UNIMP FRAME TRAP FRAME 4305 # the ftrapcc instruction should take a trap. so, here we must create a 4306 # trap stack frame from an unimplemented fp instruction stack frame and 4307 # jump to the user supplied entry point for the trap exception 4463 # the fscc instruction should take a trace trap. so, here we must create a 16171 # then, the SNAN bit is set in the FPSR EXC byte. If the SNAN trap # [all...] |