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    Searched refs:TSR_WIS (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/powerpc/ibm4xx/dev/
wdog.c 153 mtspr(SPR_TSR, TSR_ENW | TSR_WIS);
158 tsr |= TSR_ENW | TSR_WIS;
175 mtspr(SPR_TSR, TSR_ENW | TSR_WIS);
197 tsr &= ~(TSR_ENW | TSR_WIS);
  /src/sys/arch/powerpc/include/ibm4xx/
spr.h 163 #define TSR_WIS 0x40000000 /* Watchdog Interrupt Status */
  /src/sys/arch/powerpc/include/booke/
spr.h 281 #define TSR_WIS 0x40000000 /* Watchdog Interrupt Status (W1C) */
  /src/sys/arch/powerpc/booke/
e500_intr.c 925 mtspr(SPR_TSR, TSR_ENW|TSR_WIS);

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