| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| AVRMCAsmInfo.cpp | 19 AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) {
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| AVRMCAsmInfo.h | 25 explicit AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCSubtarget.cpp | 27 ARCSubtarget::ARCSubtarget(const Triple &TT, const std::string &CPU, 29 : ARCGenSubtargetInfo(TT, CPU, /*TuneCPU=*/CPU, FS), FrameLowering(*this),
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| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreSubtarget.cpp | 27 XCoreSubtarget::XCoreSubtarget(const Triple &TT, const std::string &CPU, 29 : XCoreGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), InstrInfo(),
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| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86TargetMachine.cpp | 95 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { 96 if (TT.isOSBinFormatMachO()) { 97 if (TT.getArch() == Triple::x86_64) 102 if (TT.isOSBinFormatCOFF()) 107 static std::string computeDataLayout(const Triple &TT) { 111 Ret += DataLayout::getManglingComponent(TT); 113 if ((TT.isArch64Bit() && 114 (TT.getEnvironment() == Triple::GNUX32 || TT.isOSNaCl())) || 115 !TT.isArch64Bit() [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblySubtarget.cpp | 40 WebAssemblySubtarget::WebAssemblySubtarget(const Triple &TT, 44 : WebAssemblyGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), 45 TargetTriple(TT), FrameLowering(),
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/MCTargetDesc/ |
| ARCMCAsmInfo.h | 26 explicit ARCMCAsmInfo(const Triple &TT);
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| ARCMCTargetDesc.cpp | 43 static MCRegisterInfo *createARCMCRegisterInfo(const Triple &TT) { 49 static MCSubtargetInfo *createARCMCSubtargetInfo(const Triple &TT, 51 return createARCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS); 55 const Triple &TT, 57 MCAsmInfo *MAI = new ARCMCAsmInfo(TT);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCAsmInfo.h | 25 explicit HexagonMCAsmInfo(const Triple &TT);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/ |
| MSP430MCAsmInfo.cpp | 18 MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT,
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| MSP430MCAsmInfo.h | 25 explicit MSP430MCAsmInfo(const Triple &TT, const MCTargetOptions &Options);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCAsmInfo.h | 21 explicit SystemZMCAsmInfo(const Triple &TT);
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| SystemZMCAsmInfo.cpp | 15 SystemZMCAsmInfo::SystemZMCAsmInfo(const Triple &TT) { 20 AssemblerDialect = TT.isOSzOS() ? AD_HLASM : AD_ATT;
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| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/MCTargetDesc/ |
| XCoreMCAsmInfo.h | 25 explicit XCoreMCAsmInfo(const Triple &TT);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCAsmInfo.h | 23 explicit BPFMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) { 24 if (TT.getArch() == Triple::bpfeb)
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| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/MCTargetDesc/ |
| M68kMCTargetDesc.cpp | 43 static std::string ParseM68kTriple(const Triple &TT, StringRef CPU) { 53 static MCRegisterInfo *createM68kMCRegisterInfo(const Triple &TT) { 59 static MCSubtargetInfo *createM68kMCSubtargetInfo(const Triple &TT, 61 std::string ArchFS = ParseM68kTriple(TT, CPU); 69 return createM68kMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, ArchFS); 73 const Triple &TT, 75 MCAsmInfo *MAI = new M68kELFMCAsmInfo(TT);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ |
| TargetMachine.cpp | 35 const Triple &TT, StringRef CPU, StringRef FS, 37 : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), 96 const Triple &TT = getTargetTriple(); 112 return TT.isOSBinFormatCOFF(); 127 if (TT.isWindowsGNUEnvironment() && TT.isOSBinFormatCOFF() && 134 if (TT.isOSBinFormatCOFF() && GV->hasExternalWeakLinkage()) 143 if (TT.isOSBinFormatCOFF() || TT.isOSWindows()) 146 if (TT.isOSBinFormatMachO()) [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
| CSKYMCTargetDesc.cpp | 36 const Triple &TT, 38 MCAsmInfo *MAI = new CSKYMCAsmInfo(TT); 61 static MCRegisterInfo *createCSKYMCRegisterInfo(const Triple &TT) { 67 static MCSubtargetInfo *createCSKYMCSubtargetInfo(const Triple &TT, 72 return createCSKYMCSubtargetInfoImpl(TT, CPUName, /*TuneCPU=*/CPUName, FS);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430TargetMachine.cpp | 35 static std::string computeDataLayout(const Triple &TT, StringRef CPU, 40 MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT, 46 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, 50 Subtarget(TT, std::string(CPU), std::string(FS), *this) {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUMCAsmInfo.cpp | 17 AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT, 20 CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4; 28 MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 20 : 16;
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackendDarwin.h | 19 Triple TT; 25 TT(STI.getTargetTriple()), 32 /*Is64Bit=*/false, cantFail(MachO::getCPUType(TT)), Subtype);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| VESubtarget.cpp | 44 VESubtarget::VESubtarget(const Triple &TT, const std::string &CPU, 46 : VEGenSubtargetInfo(TT, CPU, /*TuneCPU=*/CPU, FS), TargetTriple(TT),
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| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCAsmBackend.cpp | 84 Triple TT; 86 PPCAsmBackend(const Target &T, const Triple &TT) 87 : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big), 88 TT(TT) {} 217 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {} 221 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); 222 bool Is64 = TT.isPPC64(); 231 XCOFFPPCAsmBackend(const Target &T, const Triple &TT) [all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcMCTargetDesc.cpp | 36 const Triple &TT, 38 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); 46 const Triple &TT, 48 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); 61 static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) { 68 createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { 70 CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8"; 71 return createSparcMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
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| /src/external/apache2/llvm/dist/llvm/lib/MC/MCDisassembler/ |
| MCRelocationInfo.cpp | 27 MCRelocationInfo *llvm::createMCRelocationInfo(const Triple &TT,
|