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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeDAG.cpp 363 SDValue Tmp1 = Vec;
373 EVT VT = Tmp1.getValueType();
381 DAG.getEntryNode(), dl, Tmp1, StackPtr,
1652 SDValue Tmp1 = SDValue(Node, 0);
1655 SDValue Chain = Tmp1.getOperand(0);
1671 Tmp1 = DAG.getNode(Opc, dl, VT, SP, Size); // Value
1673 Tmp1 = DAG.getNode(ISD::AND, dl, VT, Tmp1,
1675 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain
1680 Results.push_back(Tmp1);
    [all...]
LegalizeFloatTypes.cpp 1820 SDValue Tmp1, Tmp2, Tmp3, OutputChain;
1821 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi,
1823 OutputChain = Tmp1->getNumValues() > 1 ? Tmp1.getValue(1) : SDValue();
1827 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1828 Tmp1 =
1831 OutputChain = Tmp1->getNumValues() > 1 ? Tmp1.getValue(1) : SDValue();
1835 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2)
    [all...]
SelectionDAG.cpp 2103 SDValue Tmp1 = Node->getOperand(0);
2107 SDValue VAListLoad = getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1,
2121 Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
2126 Tmp1 =
2127 getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2, MachinePointerInfo(V));
2129 return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo());
2139 SDValue Tmp1 =
2142 return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
  /src/external/gpl3/gcc/dist/libgcc/config/libbid/
bid32_to_bid128.c 78 UINT128 CX, T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CX1;
238 __shl_128_long (Tmp1, Tmp, amount);
242 if (__unsigned_compare_ge_128 (Qh, Tmp1))
bid64_to_bid128.c 77 UINT128 CX, T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CX1;
235 __shl_128_long (Tmp1, Tmp, amount);
239 if (__unsigned_compare_ge_128 (Qh, Tmp1))
bid_internal.h 1483 UINT128 T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CQ2, CQ8;
1598 __shl_128_long (Tmp1, Tmp, amount);
1602 if (__unsigned_compare_ge_128 (Qh, Tmp1))
1626 UINT128 T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1;
1732 __shl_128_long (Tmp1, Tmp, amount);
1736 if (__unsigned_compare_ge_128 (Qh, Tmp1))
  /src/external/gpl3/gcc.old/dist/libgcc/config/libbid/
bid32_to_bid128.c 78 UINT128 CX, T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CX1;
238 __shl_128_long (Tmp1, Tmp, amount);
242 if (__unsigned_compare_ge_128 (Qh, Tmp1))
bid64_to_bid128.c 77 UINT128 CX, T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CX1;
235 __shl_128_long (Tmp1, Tmp, amount);
239 if (__unsigned_compare_ge_128 (Qh, Tmp1))
bid_internal.h 1483 UINT128 T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CQ2, CQ8;
1598 __shl_128_long (Tmp1, Tmp, amount);
1602 if (__unsigned_compare_ge_128 (Qh, Tmp1))
1626 UINT128 T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1;
1732 __shl_128_long (Tmp1, Tmp, amount);
1736 if (__unsigned_compare_ge_128 (Qh, Tmp1))
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
IntrinsicLowering.cpp 63 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8),
67 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16");
77 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24),
86 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2");
107 Value* Tmp1 = Builder.CreateLShr(V,
137 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4");
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
IntegerDivision.cpp 121 // ; %tmp1 = ashr i32 %divisor, 31
124 // ; %tmp3 = xor i32 %tmp1, %divisor
125 // ; %u_dvsr = sub nsw i32 %tmp3, %tmp1
126 // ; %q_sgn = xor i32 %tmp1, %tmp
131 Value *Tmp1 = Builder.CreateAShr(Divisor, Shift);
134 Value *Tmp3 = Builder.CreateXor(Tmp1, Divisor);
135 Value *U_Dvsr = Builder.CreateSub(Tmp3, Tmp1);
136 Value *Q_Sgn = Builder.CreateXor(Tmp1, Tmp);
242 // ; %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %dividend, i1 true)
243 // ; %sr = sub nsw i32 %tmp0, %tmp1
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelLowering.cpp 1808 Register Tmp1 = MRI.createVirtualRegister(RC);
1814 // lea %Tmp1, TargetBB@gotoff_lo
1815 // and %Tmp2, %Tmp1, (32)0
1817 BuildMI(MBB, I, DL, TII->get(VE::LEAzii), Tmp1)
1822 .addReg(Tmp1, getKillRegState(true))
1830 // lea %Tmp1, TargetBB@lo
1831 // and %Tmp2, %Tmp1, (32)0
1833 BuildMI(MBB, I, DL, TII->get(VE::LEAzii), Tmp1)
1838 .addReg(Tmp1, getKillRegState(true))
1872 Register Tmp1 = MRI.createVirtualRegister(RC)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 3733 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4;
3734 if (tryFoldLoad(Node, N0.getNode(), Input, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) {
3736 Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Control, Input.getOperand(0)};
3769 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4;
3770 if (MayFoldLoad && tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) {
3771 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm,
3802 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4;
3803 if (MayFoldLoad && tryFoldLoad(Node, N2, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) {
3804 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm,
4070 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/
CheckerManager.cpp 125 ExplodedNodeSet Tmp1, Tmp2;
133 CurrSet = (PrevSet == &Tmp1) ? &Tmp2 : &Tmp1;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUPromoteAlloca.cpp 942 Value *Tmp1 = Builder.CreateMul(TIdY, TCntZ, "", true, true);
943 Value *TID = Builder.CreateAdd(Tmp0, Tmp1);
AMDGPULegalizerInfo.cpp 1900 auto Tmp1 = B.buildFAdd(Ty, Src, CopySign);
1901 auto Tmp2 = B.buildFSub(Ty, Tmp1, CopySign);
2013 auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0);
2014 B.buildSelect(MI.getOperand(0).getReg(), ExpGt51, Src, Tmp1);
3135 auto Tmp1 = B.buildFMA(ResTy, NegY, R, One);
3136 R = B.buildFMA(ResTy, Tmp1, R, R);
SIISelLowering.cpp 3272 SDValue Tmp1 = Op;
3275 SDValue Chain = Tmp1.getOperand(0);
3298 Tmp1 = DAG.getNode(Opc, dl, VT, SP, ScaledSize); // Value
3300 Tmp1 = DAG.getNode(ISD::AND, dl, VT, Tmp1,
3306 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain
3311 return DAG.getMergeValues({Tmp1, Tmp2}, dl);
8293 SDValue Tmp1 = DAG.getNode(ISD::FMA, SL, VT, NegY, R, One);
8294 R = DAG.getNode(ISD::FMA, SL, VT, Tmp1, R, R);
9875 SDValue Tmp1 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(0))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 409 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg;
411 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg));
425 BuildMI(BB, DL, TII.get(FConst), Tmp1)
427 BuildMI(BB, DL, TII.get(LT), CmpReg).addReg(Tmp0).addReg(Tmp1);
431 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg));
435 BuildMI(BB, DL, TII.get(FConst), Tmp1)
437 BuildMI(BB, DL, TII.get(GE), SecondCmpReg).addReg(Tmp0).addReg(Tmp1);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonHardwareLoops.cpp 1875 SmallVector<MachineOperand,2> Tmp1;
1878 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Tmp1, false))
1883 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp1, false);
HexagonSplitDouble.cpp 689 auto *Tmp1 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, A);
690 LowI->addMemOperand(MF, Tmp1);
933 // Tmp1 = extractu R2.lo, #s, #32-s
934 // Tmp2 = or R1.hi, Tmp1
HexagonVectorCombine.cpp 452 Value *Tmp1 = Builder.CreateGEP(Tmp0, HVC.getConstInt(Adjust));
453 return Builder.CreatePointerCast(Tmp1, ValTy->getPointerTo());
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp 1982 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt);
1986 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2);
2042 SDValue Tmp1 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt);
2046 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2);
2397 SDValue Tmp1 = ST->getChain();
2403 DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), MVT::i8,
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGExprComplex.cpp 855 llvm::Value *Tmp1 = Builder.CreateMul(LHSr, RHSr); // a*c
857 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 5730 SDValue Tmp1 = Op.getOperand(1);
5733 EVT SrcVT = Tmp1.getValueType();
5751 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1);
5753 Tmp1 = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT,
5754 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1),
5757 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64,
5758 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1),
5761 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Support/
APInt.cpp 676 uint64_t Tmp1 = ByteSwap_64(U.VAL);
677 Tmp1 >>= (64 - BitWidth);
678 return APInt(BitWidth, Tmp1);

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