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Searched refs:U4_16 (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c	207 #define U4_16 (U4_12 + 1) /* 4 bit unsigned value starting at 16 / 209 #define U4_20 (U4_16 + 1) / 4 bit unsigned value starting at 20 / 377 #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } / e.g. fidbr / 378 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr / 379 #define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } / e.g. cfebr / 380 #define INSTR_RRF_U0RFE 4, { R_24,U4_16,FE_28,0,0,0 } / e.g. cfxbr / 381 #define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } / e.g. fidtr / 382 #define INSTR_RRF_UUFFE 4, { F_24,U4_16,FE_28,U4_20,0,0 } / e.g. ldxtr / 383 #define INSTR_RRF_UUFEFE 4, { FE_24,U4_16,FE_28,U4_20,0,0 } / e.g. fixtr / 388 #define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } / e.g. sske * [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c	207 #define U4_16 (U4_12 + 1) /* 4 bit unsigned value starting at 16 / 209 #define U4_20 (U4_16 + 1) / 4 bit unsigned value starting at 20 / 377 #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } / e.g. fidbr / 378 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr / 379 #define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } / e.g. cfebr / 380 #define INSTR_RRF_U0RFE 4, { R_24,U4_16,FE_28,0,0,0 } / e.g. cfxbr / 381 #define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } / e.g. fidtr / 382 #define INSTR_RRF_UUFFE 4, { F_24,U4_16,FE_28,U4_20,0,0 } / e.g. ldxtr / 383 #define INSTR_RRF_UUFEFE 4, { FE_24,U4_16,FE_28,U4_20,0,0 } / e.g. fixtr / 388 #define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } / e.g. sske * [all...]
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c	207 #define U4_16 (U4_12 + 1) /* 4 bit unsigned value starting at 16 / 209 #define U4_20 (U4_16 + 1) / 4 bit unsigned value starting at 20 / 377 #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } / e.g. fidbr / 378 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr / 379 #define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } / e.g. cfebr / 380 #define INSTR_RRF_U0RFE 4, { R_24,U4_16,FE_28,0,0,0 } / e.g. cfxbr / 381 #define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } / e.g. fidtr / 382 #define INSTR_RRF_UUFFE 4, { F_24,U4_16,FE_28,U4_20,0,0 } / e.g. ldxtr / 383 #define INSTR_RRF_UUFEFE 4, { FE_24,U4_16,FE_28,U4_20,0,0 } / e.g. fixtr / 388 #define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } / e.g. sske * [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c	205 #define U4_16 (U4_12 + 1) /* 4 bit unsigned value starting at 16 / 207 #define U4_20 (U4_16 + 1) / 4 bit unsigned value starting at 20 / 387 #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } / e.g. fidbr / 388 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr / 389 #define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } / e.g. cfebr / 390 #define INSTR_RRF_U0RFE 4, { R_24,U4_16,FE_28,0,0,0 } / e.g. cfxbr / 391 #define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } / e.g. fidtr / 392 #define INSTR_RRF_UUFFE 4, { F_24,U4_16,FE_28,U4_20,0,0 } / e.g. ldxtr / 393 #define INSTR_RRF_UUFEFE 4, { FE_24,U4_16,FE_28,U4_20,0,0 } / e.g. fixtr / 398 #define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } / e.g. sske * [all...]

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