| /src/external/gpl3/gdb.old/dist/sim/frv/ |
| cpu.h | 270 #define GET_H_IACC0(index) ORDI (SLLDI (EXTSIDI (GET_H_SPR (((UINT) 280))), 32), ZEXTSIDI (GET_H_SPR (((UINT) 281))))
274 SET_H_SPR (((UINT) 280), TRUNCDISI (SRLDI ((x), 32)));\
275 SET_H_SPR (((UINT) 281), TRUNCDISI ((x)));\
318 USI frvbf_h_gr_get (SIM_CPU *, UINT);
319 void frvbf_h_gr_set (SIM_CPU *, UINT, USI);
320 DI frvbf_h_gr_double_get (SIM_CPU *, UINT);
321 void frvbf_h_gr_double_set (SIM_CPU *, UINT, DI);
322 UHI frvbf_h_gr_hi_get (SIM_CPU *, UINT);
323 void frvbf_h_gr_hi_set (SIM_CPU *, UINT, UHI)
[all...] |
| /src/external/gpl3/gdb/dist/sim/frv/ |
| cpu.h | 270 #define GET_H_IACC0(index) ORDI (SLLDI (EXTSIDI (GET_H_SPR (((UINT) 280))), 32), ZEXTSIDI (GET_H_SPR (((UINT) 281))))
274 SET_H_SPR (((UINT) 280), TRUNCDISI (SRLDI ((x), 32)));\
275 SET_H_SPR (((UINT) 281), TRUNCDISI ((x)));\
318 USI frvbf_h_gr_get (SIM_CPU *, UINT);
319 void frvbf_h_gr_set (SIM_CPU *, UINT, USI);
320 DI frvbf_h_gr_double_get (SIM_CPU *, UINT);
321 void frvbf_h_gr_double_set (SIM_CPU *, UINT, DI);
322 UHI frvbf_h_gr_hi_get (SIM_CPU *, UINT);
323 void frvbf_h_gr_hi_set (SIM_CPU *, UINT, UHI)
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/iq2000/ |
| cpu.h | 71 SI iq2000bf_h_gr_get (SIM_CPU *, UINT);
72 void iq2000bf_h_gr_set (SIM_CPU *, UINT, SI);
93 UINT f_rs;
94 UINT f_rt;
97 UINT f_imm;
98 UINT f_rs;
99 UINT f_rt;
102 UINT f_mask;
103 UINT f_rd;
104 UINT f_rs
[all...] |
| /src/external/gpl3/gdb/dist/sim/iq2000/ |
| cpu.h | 71 SI iq2000bf_h_gr_get (SIM_CPU *, UINT);
72 void iq2000bf_h_gr_set (SIM_CPU *, UINT, SI);
93 UINT f_rs;
94 UINT f_rt;
97 UINT f_imm;
98 UINT f_rs;
99 UINT f_rt;
102 UINT f_mask;
103 UINT f_rd;
104 UINT f_rs
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/lm32/ |
| user.c | 31 UINT
32 lm32bf_user_insn (SIM_CPU * current_cpu, INT r0, INT r1, UINT imm)
|
| cpu.h | 64 SI lm32bf_h_gr_get (SIM_CPU *, UINT);
65 void lm32bf_h_gr_set (SIM_CPU *, UINT, SI);
66 SI lm32bf_h_csr_get (SIM_CPU *, UINT);
67 void lm32bf_h_csr_set (SIM_CPU *, UINT, SI);
87 UINT f_csr;
88 UINT f_r1;
91 UINT f_csr;
92 UINT f_r2;
96 UINT f_r0;
97 UINT f_r1
[all...] |
| /src/external/gpl3/gdb/dist/sim/lm32/ |
| user.c | 31 UINT
32 lm32bf_user_insn (SIM_CPU * current_cpu, INT r0, INT r1, UINT imm)
|
| cpu.h | 64 SI lm32bf_h_gr_get (SIM_CPU *, UINT);
65 void lm32bf_h_gr_set (SIM_CPU *, UINT, SI);
66 SI lm32bf_h_csr_get (SIM_CPU *, UINT);
67 void lm32bf_h_csr_set (SIM_CPU *, UINT, SI);
87 UINT f_csr;
88 UINT f_r1;
91 UINT f_csr;
92 UINT f_r2;
96 UINT f_r0;
97 UINT f_r1
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/cris/ |
| cpuv10.h | 58 #define GET_H_SR_V10(index) (ORIF (ORIF (((index) == (((UINT) 0))), ((index) == (((UINT) 4)))), ((index) == (((UINT) 8))))) ? (0) : (((index) == (((UINT) 1)))) ? (10) : (ORIF (((index) == (((UINT) 5))), ((index) == (((UINT) 13))))) ? (ORSI (ANDSI (CPU (h_sr_v10[((UINT) 5)]), 0xffffff00), ORSI (ZEXTBISI (CPU (h_cbit)), ORSI (SLLSI (ZEXTBISI (CPU (h_vbit)), 1), ORSI (SLLSI (ZEXTBISI (CPU (h_zbit)), 2), ORSI (SLLSI (ZEXTBISI (CPU (h_nbit)), 3), ORSI (SLLSI (ZEXTBISI (CPU (h_xbit)), 4), ORSI (SLLSI (ZEXTBISI (GET_H_IBIT ()), 5), ORSI (SLLSI (ZEXTBISI (GET_H_UBIT ()), 6), ORSI (SLLSI (ZEXTBISI (CPU (h_pbit)), 7), 0)))))))))) : (CPU (h_sr_v10[index]))
61 if (ORIF (ORIF ((((index)) == (((UINT) 0))), (((index)) == (((UINT) 4)))), ORIF ((((index)) == (((UINT) 8))), (((index)) == (((UINT) 1)))))) {
[all...] |
| cpuv32.h | 58 #define GET_H_SR_V32(index) (ORIF (ORIF (((index) == (((UINT) 0))), ((index) == (((UINT) 4)))), ((index) == (((UINT) 8))))) ? (0) : (((index) == (((UINT) 1)))) ? (32) : (((index) == (((UINT) 13)))) ? (ORSI (ANDSI (CPU (h_sr_v32[((UINT) 13)]), 1073740800), ORSI (ZEXTBISI (CPU (h_cbit)), ORSI (SLLSI (ZEXTBISI (CPU (h_vbit)), 1), ORSI (SLLSI (ZEXTBISI (CPU (h_zbit)), 2), ORSI (SLLSI (ZEXTBISI (CPU (h_nbit)), 3), ORSI (SLLSI (ZEXTBISI (CPU (h_xbit)), 4), ORSI (SLLSI (ZEXTBISI (GET_H_IBIT ()), 5), ORSI (SLLSI (ZEXTBISI (GET_H_UBIT ()), 6), ORSI (SLLSI (ZEXTBISI (CPU (h_pbit)), 7), ORSI (SLLSI (ZEXTBISI (CPU (h_rbit)), 8), ORSI (SLLSI (ZEXTBISI (CPU (h_sbit)), 9), ORSI (SLLSI (ZEXTBISI (CPU (h_mbit)), 30), ORSI (SLLSI (ZEXTBISI (CPU (h_qbit)), 31), 0)))))))))))))) : (((index) == (((UINT) 14)))) ? (((GET_H_UBIT ()) ? (CPU (h_gr_acr[((UINT) 14)])) : (CPU (h_sr_v32[((UINT) 14)])))) : (CPU (h_sr_v32[index]))
61 if (ORIF (ORIF ((((index)) == (((UINT) 0))), (((index)) == (((UINT) 4)))), ORIF ((((index)) == (((UINT) 8))), (((index)) == (((UINT) 1)) (…)
[all...] |
| /src/external/gpl3/gdb/dist/sim/cris/ |
| cpuv10.h | 58 #define GET_H_SR_V10(index) (ORIF (ORIF (((index) == (((UINT) 0))), ((index) == (((UINT) 4)))), ((index) == (((UINT) 8))))) ? (0) : (((index) == (((UINT) 1)))) ? (10) : (ORIF (((index) == (((UINT) 5))), ((index) == (((UINT) 13))))) ? (ORSI (ANDSI (CPU (h_sr_v10[((UINT) 5)]), 0xffffff00), ORSI (ZEXTBISI (CPU (h_cbit)), ORSI (SLLSI (ZEXTBISI (CPU (h_vbit)), 1), ORSI (SLLSI (ZEXTBISI (CPU (h_zbit)), 2), ORSI (SLLSI (ZEXTBISI (CPU (h_nbit)), 3), ORSI (SLLSI (ZEXTBISI (CPU (h_xbit)), 4), ORSI (SLLSI (ZEXTBISI (GET_H_IBIT ()), 5), ORSI (SLLSI (ZEXTBISI (GET_H_UBIT ()), 6), ORSI (SLLSI (ZEXTBISI (CPU (h_pbit)), 7), 0)))))))))) : (CPU (h_sr_v10[index]))
61 if (ORIF (ORIF ((((index)) == (((UINT) 0))), (((index)) == (((UINT) 4)))), ORIF ((((index)) == (((UINT) 8))), (((index)) == (((UINT) 1)))))) {
[all...] |
| cpuv32.h | 58 #define GET_H_SR_V32(index) (ORIF (ORIF (((index) == (((UINT) 0))), ((index) == (((UINT) 4)))), ((index) == (((UINT) 8))))) ? (0) : (((index) == (((UINT) 1)))) ? (32) : (((index) == (((UINT) 13)))) ? (ORSI (ANDSI (CPU (h_sr_v32[((UINT) 13)]), 1073740800), ORSI (ZEXTBISI (CPU (h_cbit)), ORSI (SLLSI (ZEXTBISI (CPU (h_vbit)), 1), ORSI (SLLSI (ZEXTBISI (CPU (h_zbit)), 2), ORSI (SLLSI (ZEXTBISI (CPU (h_nbit)), 3), ORSI (SLLSI (ZEXTBISI (CPU (h_xbit)), 4), ORSI (SLLSI (ZEXTBISI (GET_H_IBIT ()), 5), ORSI (SLLSI (ZEXTBISI (GET_H_UBIT ()), 6), ORSI (SLLSI (ZEXTBISI (CPU (h_pbit)), 7), ORSI (SLLSI (ZEXTBISI (CPU (h_rbit)), 8), ORSI (SLLSI (ZEXTBISI (CPU (h_sbit)), 9), ORSI (SLLSI (ZEXTBISI (CPU (h_mbit)), 30), ORSI (SLLSI (ZEXTBISI (CPU (h_qbit)), 31), 0)))))))))))))) : (((index) == (((UINT) 14)))) ? (((GET_H_UBIT ()) ? (CPU (h_gr_acr[((UINT) 14)])) : (CPU (h_sr_v32[((UINT) 14)])))) : (CPU (h_sr_v32[index]))
61 if (ORIF (ORIF ((((index)) == (((UINT) 0))), (((index)) == (((UINT) 4)))), ORIF ((((index)) == (((UINT) 8))), (((index)) == (((UINT) 1)) (…)
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/m32r/ |
| cpu.h | 97 SI m32rbf_h_gr_get (SIM_CPU *, UINT);
98 void m32rbf_h_gr_set (SIM_CPU *, UINT, SI);
99 USI m32rbf_h_cr_get (SIM_CPU *, UINT);
100 void m32rbf_h_cr_set (SIM_CPU *, UINT, USI);
119 UINT h_gr;
133 UINT f_uimm8;
136 UINT f_uimm4;
148 UINT f_hi16;
149 UINT f_r1;
155 UINT f_r1
[all...] |
| cpu2.h | 104 SI m32r2f_h_gr_get (SIM_CPU *, UINT);
105 void m32r2f_h_gr_set (SIM_CPU *, UINT, SI);
106 USI m32r2f_h_cr_get (SIM_CPU *, UINT);
107 void m32r2f_h_cr_set (SIM_CPU *, UINT, USI);
110 DI m32r2f_h_accums_get (SIM_CPU *, UINT);
111 void m32r2f_h_accums_set (SIM_CPU *, UINT, DI);
138 UINT f_uimm8;
141 UINT f_uimm4;
153 UINT f_accd;
154 UINT f_accs
[all...] |
| cpux.h | 104 SI m32rxf_h_gr_get (SIM_CPU *, UINT);
105 void m32rxf_h_gr_set (SIM_CPU *, UINT, SI);
106 USI m32rxf_h_cr_get (SIM_CPU *, UINT);
107 void m32rxf_h_cr_set (SIM_CPU *, UINT, USI);
110 DI m32rxf_h_accums_get (SIM_CPU *, UINT);
111 void m32rxf_h_accums_set (SIM_CPU *, UINT, DI);
138 UINT f_uimm8;
141 UINT f_uimm4;
153 UINT f_accd;
154 UINT f_accs
[all...] |
| /src/external/gpl3/gdb/dist/sim/m32r/ |
| cpu.h | 97 SI m32rbf_h_gr_get (SIM_CPU *, UINT);
98 void m32rbf_h_gr_set (SIM_CPU *, UINT, SI);
99 USI m32rbf_h_cr_get (SIM_CPU *, UINT);
100 void m32rbf_h_cr_set (SIM_CPU *, UINT, USI);
119 UINT h_gr;
133 UINT f_uimm8;
136 UINT f_uimm4;
148 UINT f_hi16;
149 UINT f_r1;
155 UINT f_r1
[all...] |
| /src/external/bsd/libpcap/dist/ |
| charconv.h | 39 extern wchar_t *cp_to_utf_16le(UINT codepage, const char *cp_string, DWORD flags);
40 extern char *utf_16le_to_cp(UINT codepage, const wchar_t *utf16le_string);
|
| /src/usr.bin/xlint/arch/coldfire/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
| /src/usr.bin/xlint/arch/i386/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
| /src/usr.bin/xlint/arch/m68000/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
| /src/usr.bin/xlint/arch/m68k/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
| /src/usr.bin/xlint/arch/or1k/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
| /src/usr.bin/xlint/arch/powerpc/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
| /src/usr.bin/xlint/arch/riscv32/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
| /src/usr.bin/xlint/arch/sh3/ |
| targparam.h | 46 #define SIZEOF_TSPEC UINT
|
