HomeSort by: relevance | last modified time | path
    Searched refs:UNIPHY_POWER_CONTROL__UNIPHY_BIASREF_SEL_MASK (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h 9263 #define UNIPHY_POWER_CONTROL__UNIPHY_BIASREF_SEL_MASK 0x00000004L
dce_8_0_sh_mask.h 4399 #define UNIPHY_POWER_CONTROL__UNIPHY_BIASREF_SEL_MASK 0x4
dce_10_0_sh_mask.h 11955 #define UNIPHY_POWER_CONTROL__UNIPHY_BIASREF_SEL_MASK 0xc
    [all...]
dce_11_0_sh_mask.h 11767 #define UNIPHY_POWER_CONTROL__UNIPHY_BIASREF_SEL_MASK 0xc
    [all...]

Completed in 146 milliseconds