HomeSort by: relevance | last modified time | path
    Searched refs:UOps (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/
HWEventListener.h 75 unsigned UOps)
77 UsedPhysRegs(Regs), MicroOpcodes(UOps) {}
  /src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
DispatchStage.cpp 40 unsigned UOps) const {
43 HWInstructionDispatchedEvent(IR, UsedRegs, UOps));
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetSchedule.cpp 110 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass());
111 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI);
TargetInstrInfo.cpp 1126 int UOps = ItinData->Itineraries[Class].NumMicroOps;
1127 if (UOps >= 0)
1128 return UOps;
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 3430 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass());
3431 assert(UOps >= 0 && "bad # UOps");
3432 return UOps;
3690 unsigned UOps = 1 + NumRegs; // 1 for address computation.
3716 ++UOps; // One for base register writeback.
3721 UOps += 2; // One for base reg wb, one for write to pc.
3724 return UOps;
3745 llvm_unreachable("Unexpected multi-uops instruction!");
3750 // The number of uOps for load / store multiple are determined by the numbe
    [all...]

Completed in 36 milliseconds