| /src/external/gpl3/gcc/dist/gcc/config/riscv/ |
| riscv-ftypes.def | 36 DEF_RISCV_FTYPE (1, (USI, UQI))
40 DEF_RISCV_FTYPE (2, (USI, UQI, UQI))
46 DEF_RISCV_FTYPE (2, (USI, USI, UQI))
47 DEF_RISCV_FTYPE (2, (UDI, UQI, UQI))
50 DEF_RISCV_FTYPE (2, (UDI, UDI, UQI))
55 DEF_RISCV_FTYPE (3, (USI, USI, USI, UQI))
57 DEF_RISCV_FTYPE (3, (USI, USI, UQI, USI))
62 DEF_RISCV_FTYPE (3, (SI, SI, SI, UQI))
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/loongarch/ |
| loongarch-ftypes.def | 39 DEF_LARCH_FTYPE (1, (UQI, USI))
43 DEF_LARCH_FTYPE (1, (USI, UQI))
46 DEF_LARCH_FTYPE (2, (VOID, UQI, USI))
50 DEF_LARCH_FTYPE (2, (VOID, DI, UQI))
51 DEF_LARCH_FTYPE (2, (VOID, SI, UQI))
53 DEF_LARCH_FTYPE (2, (SI, SI, UQI))
54 DEF_LARCH_FTYPE (2, (DI, DI, UQI))
|
| /src/external/gpl3/gdb/dist/sim/m32r/ |
| m32r-sim.h | 50 extern UQI m32rbf_h_psw_get (SIM_CPU *);
51 extern void m32rbf_h_psw_set (SIM_CPU *, UQI);
52 extern UQI m32r2f_h_psw_get (SIM_CPU *);
53 extern void m32r2f_h_psw_set (SIM_CPU *, UQI);
54 extern UQI m32rxf_h_psw_get (SIM_CPU *);
55 extern void m32rxf_h_psw_set (SIM_CPU *, UQI);
56 extern void m32rbf_h_bpsw_set (SIM_CPU *, UQI);
57 extern void m32r2f_h_bpsw_set (SIM_CPU *, UQI);
58 extern void m32rxf_h_bpsw_set (SIM_CPU *, UQI);
82 extern UQI m32rbf_h_psw_get_handler (SIM_CPU *)
[all...] |
| cpu.c | 113 UQI
122 m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
129 UQI
138 m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
145 UQI
154 m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
|
| cpu2.c | 129 UQI
138 m32r2f_h_psw_set (SIM_CPU *current_cpu, UQI newval)
145 UQI
154 m32r2f_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
161 UQI
170 m32r2f_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
|
| cpux.c | 129 UQI
138 m32rxf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
145 UQI
154 m32rxf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
161 UQI
170 m32rxf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
|
| /src/external/gpl3/gdb.old/dist/sim/m32r/ |
| m32r-sim.h | 50 extern UQI m32rbf_h_psw_get (SIM_CPU *);
51 extern void m32rbf_h_psw_set (SIM_CPU *, UQI);
52 extern UQI m32r2f_h_psw_get (SIM_CPU *);
53 extern void m32r2f_h_psw_set (SIM_CPU *, UQI);
54 extern UQI m32rxf_h_psw_get (SIM_CPU *);
55 extern void m32rxf_h_psw_set (SIM_CPU *, UQI);
56 extern void m32rbf_h_bpsw_set (SIM_CPU *, UQI);
57 extern void m32r2f_h_bpsw_set (SIM_CPU *, UQI);
58 extern void m32rxf_h_bpsw_set (SIM_CPU *, UQI);
82 extern UQI m32rbf_h_psw_get_handler (SIM_CPU *)
[all...] |
| cpu.c | 113 UQI
122 m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
129 UQI
138 m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
145 UQI
154 m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
|
| cpu2.c | 129 UQI
138 m32r2f_h_psw_set (SIM_CPU *current_cpu, UQI newval)
145 UQI
154 m32r2f_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
161 UQI
170 m32r2f_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
|
| cpux.c | 129 UQI
138 m32rxf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
145 UQI
154 m32rxf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
161 UQI
170 m32rxf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
|
| /src/external/gpl3/gcc/dist/gcc/config/loongarch/ |
| loongarch-ftypes.def | 39 DEF_LARCH_FTYPE (1, (UQI, USI))
43 DEF_LARCH_FTYPE (1, (USI, UQI))
46 DEF_LARCH_FTYPE (2, (VOID, UQI, USI))
50 DEF_LARCH_FTYPE (2, (VOID, DI, UQI))
51 DEF_LARCH_FTYPE (2, (VOID, SI, UQI))
53 DEF_LARCH_FTYPE (2, (SI, SI, UQI))
54 DEF_LARCH_FTYPE (2, (DI, DI, UQI))
74 DEF_LARCH_FTYPE (1, (DI, UQI))
86 DEF_LARCH_FTYPE (2, (DI, V2DI, UQI))
87 DEF_LARCH_FTYPE (2, (DI, V4DI, UQI))
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/mips/ |
| mips-ftypes.def | 49 DEF_MIPS_FTYPE (2, (DI, V2DI, UQI))
66 DEF_MIPS_FTYPE (1, (SI, UQI))
71 DEF_MIPS_FTYPE (2, (SI, V16QI, UQI))
76 DEF_MIPS_FTYPE (2, (SI, V4SI, UQI))
77 DEF_MIPS_FTYPE (2, (SI, V8HI, UQI))
82 DEF_MIPS_FTYPE (2, (UDI, V2DI, UQI))
84 DEF_MIPS_FTYPE (2, (USI, V16QI, UQI))
85 DEF_MIPS_FTYPE (2, (USI, V4SI, UQI))
86 DEF_MIPS_FTYPE (2, (USI, V8HI, UQI))
89 DEF_MIPS_FTYPE (2, (UV16QI, UV16QI, UQI))
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/mips/ |
| mips-ftypes.def | 49 DEF_MIPS_FTYPE (2, (DI, V2DI, UQI))
66 DEF_MIPS_FTYPE (1, (SI, UQI))
71 DEF_MIPS_FTYPE (2, (SI, V16QI, UQI))
76 DEF_MIPS_FTYPE (2, (SI, V4SI, UQI))
77 DEF_MIPS_FTYPE (2, (SI, V8HI, UQI))
82 DEF_MIPS_FTYPE (2, (UDI, V2DI, UQI))
84 DEF_MIPS_FTYPE (2, (USI, V16QI, UQI))
85 DEF_MIPS_FTYPE (2, (USI, V4SI, UQI))
86 DEF_MIPS_FTYPE (2, (USI, V8HI, UQI))
89 DEF_MIPS_FTYPE (2, (UV16QI, UV16QI, UQI))
[all...] |
| /src/external/gpl3/binutils/dist/include/cgen/ |
| basic-modes.h | 33 typedef uint8_t UQI;
|
| basic-ops.h | 61 #define UDIVQI(x, y) ((UQI) (x) / (UQI) (y))
63 #define UMODQI(x, y) ((UQI) (x) % (UQI) (y))
65 #define SRLQI(x, y) ((UQI) (x) >> (y))
66 #define SLLQI(x, y) ((UQI) (x) << (y))
82 #define LTUQI(x, y) ((UQI) (x) < (UQI) (y))
83 #define LEUQI(x, y) ((UQI) (x) <= (UQI) (y)
[all...] |
| /src/external/gpl3/binutils.old/dist/include/cgen/ |
| basic-modes.h | 33 typedef uint8_t UQI;
|
| basic-ops.h | 61 #define UDIVQI(x, y) ((UQI) (x) / (UQI) (y))
63 #define UMODQI(x, y) ((UQI) (x) % (UQI) (y))
65 #define SRLQI(x, y) ((UQI) (x) >> (y))
66 #define SLLQI(x, y) ((UQI) (x) << (y))
82 #define LTUQI(x, y) ((UQI) (x) < (UQI) (y))
83 #define LEUQI(x, y) ((UQI) (x) <= (UQI) (y)
[all...] |
| /src/external/gpl3/gdb/dist/include/cgen/ |
| basic-modes.h | 33 typedef uint8_t UQI;
|
| basic-ops.h | 61 #define UDIVQI(x, y) ((UQI) (x) / (UQI) (y))
63 #define UMODQI(x, y) ((UQI) (x) % (UQI) (y))
65 #define SRLQI(x, y) ((UQI) (x) >> (y))
66 #define SLLQI(x, y) ((UQI) (x) << (y))
82 #define LTUQI(x, y) ((UQI) (x) < (UQI) (y))
83 #define LEUQI(x, y) ((UQI) (x) <= (UQI) (y)
[all...] |
| /src/external/gpl3/gdb.old/dist/include/cgen/ |
| basic-modes.h | 33 typedef uint8_t UQI;
|
| basic-ops.h | 61 #define UDIVQI(x, y) ((UQI) (x) / (UQI) (y))
63 #define UMODQI(x, y) ((UQI) (x) % (UQI) (y))
65 #define SRLQI(x, y) ((UQI) (x) >> (y))
66 #define SLLQI(x, y) ((UQI) (x) << (y))
82 #define LTUQI(x, y) ((UQI) (x) < (UQI) (y))
83 #define LEUQI(x, y) ((UQI) (x) <= (UQI) (y)
[all...] |
| /src/external/gpl3/gdb/dist/sim/frv/ |
| cpu.c | 65 UQI
74 frvbf_h_psr_imple_set (SIM_CPU *current_cpu, UQI newval)
81 UQI
90 frvbf_h_psr_ver_set (SIM_CPU *current_cpu, UQI newval)
209 UQI
218 frvbf_h_psr_pil_set (SIM_CPU *current_cpu, UQI newval)
289 UQI
298 frvbf_h_tbr_tt_set (SIM_CPU *current_cpu, UQI newval)
657 UQI
666 frvbf_h_iccr_set (SIM_CPU *current_cpu, UINT regno, UQI newval
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/frv/ |
| cpu.c | 65 UQI
74 frvbf_h_psr_imple_set (SIM_CPU *current_cpu, UQI newval)
81 UQI
90 frvbf_h_psr_ver_set (SIM_CPU *current_cpu, UQI newval)
209 UQI
218 frvbf_h_psr_pil_set (SIM_CPU *current_cpu, UQI newval)
289 UQI
298 frvbf_h_tbr_tt_set (SIM_CPU *current_cpu, UQI newval)
657 UQI
666 frvbf_h_iccr_set (SIM_CPU *current_cpu, UINT regno, UQI newval
[all...] |
| /src/external/gpl3/gdb/dist/sim/common/ |
| cgen-ops.h | 63 #define ADDQI(x, y) ((QI) ((UQI) (x) + (UQI) (y)))
64 #define SUBQI(x, y) ((QI) ((UQI) (x) - (UQI) (y)))
65 #define MULQI(x, y) ((QI) ((UQI) (x) * (UQI) (y)))
67 #define UDIVQI(x, y) ((UQI) (x) / (UQI) (y))
69 #define UMODQI(x, y) ((UQI) (x) % (UQI) (y)
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/common/ |
| cgen-ops.h | 63 #define ADDQI(x, y) ((QI) ((UQI) (x) + (UQI) (y)))
64 #define SUBQI(x, y) ((QI) ((UQI) (x) - (UQI) (y)))
65 #define MULQI(x, y) ((QI) ((UQI) (x) * (UQI) (y)))
67 #define UDIVQI(x, y) ((UQI) (x) / (UQI) (y))
69 #define UMODQI(x, y) ((UQI) (x) % (UQI) (y)
[all...] |
