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  /src/external/apache2/llvm/dist/llvm/lib/IR/
ReplaceConstant.cpp 39 case Instruction::URem:
ConstantFold.cpp 1185 case Instruction::URem:
1274 case Instruction::URem:
1395 case Instruction::URem:
1397 return ConstantInt::get(CI1->getContext(), C1V.urem(C2V));
1427 case Instruction::URem:
1532 case Instruction::URem:
Instruction.cpp 346 case URem: return "urem";
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
IntegerDivision.cpp 30 /// instruction. This will generate a urem in the process, and Builder's insert
54 // ; %urem = urem i32 %dividend, %divisor
55 // ; %xored = xor i32 %urem, %dividend_sgn
63 Value *URem = Builder.CreateURem(UDividend, UDivisor);
64 Value *Xored = Builder.CreateXor(URem, DividendSign);
67 if (Instruction *URemInst = dyn_cast<Instruction>(URem))
76 /// code generated, e.g. at the urem instruction. This will generate a udiv in
377 Rem->getOpcode() == Instruction::URem) &&
398 // If we didn't actually generate an urem instruction, we're don
    [all...]
BypassSlowDivision.cpp 117 case Instruction::URem:
299 // udiv/urem because this optimization only handles positive numbers.
SimplifyIndVar.cpp 342 auto *URem = BinaryOperator::Create(BinaryOperator::URem, N, D,
343 Rem->getName() + ".urem", Rem);
344 Rem->replaceAllUsesWith(URem);
375 /// operating on an induction variable or replacing srem by urem.
381 // the numerator, unless it is a srem, because we want to replace srem by urem
417 // Try to replace SRem with URem, if both N and D are known non-negative.
645 if (IsSRem || Bin->getOpcode() == Instruction::URem) {
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
DivRemPairs.cpp 93 // it's not strictly required to be a urem/srem.
109 case Instruction::URem:
139 else if (I.getOpcode() == Instruction::URem)
CorrelatedValuePropagation.cpp 67 STATISTIC(NumSRems, "Number of srem converted to urem");
724 /// Try to shrink a udiv/urem's width down to the smallest power of two that's
728 Instr->getOpcode() == Instruction::URem);
800 auto *URem =
802 URem->setDebugLoc(SDI->getDebugLoc());
804 Value *Res = URem;
813 // Try to simplify our new urem.
814 processUDivOrURem(URem, LVI);
1052 case Instruction::URem:
GVNSink.cpp 457 case Instruction::URem:
  /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/InstCombine/
InstCombiner.h 317 case Instruction::URem: // X %u 1 = 0
335 case Instruction::URem: // 0 %u X = 0
  /src/external/apache2/llvm/dist/llvm/lib/FuzzMutate/
Operations.cpp 25 Ops.push_back(binOpDescriptor(1, Instruction::URem));
103 case Instruction::URem:
  /src/external/apache2/llvm/dist/llvm/include/llvm/IR/
Instruction.h 191 return Opcode == UDiv || Opcode == SDiv || Opcode == URem || Opcode == SRem;
PatternMatch.h 1105 inline BinaryOp_match<LHS, RHS, Instruction::URem> m_URem(const LHS &L,
1107 return BinaryOp_match<LHS, RHS, Instruction::URem>(L, R);
1300 return Opcode == Instruction::SRem || Opcode == Instruction::URem;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
ExpandVectorPredication.cpp 237 case Instruction::URem:
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUCodeGenPrepare.cpp 320 I.getOpcode() == Instruction::URem)
1017 assert(Opc == Instruction::URem || Opc == Instruction::UDiv ||
1177 if (Opc == Instruction::URem || Opc == Instruction::SRem) {
1204 if ((Opc == Instruction::URem || Opc == Instruction::UDiv ||
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZTargetTransformInfo.cpp 167 case Instruction::URem:
415 Opcode == Instruction::UDiv || Opcode == Instruction::URem;
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
CFLGraph.h 577 case Instruction::URem:
ObjCARCInstKind.cpp 262 case Instruction::URem:
  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
TargetTransformInfoImpl.h 464 case Instruction::URem:
978 case Instruction::URem:
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineVectorOps.cpp 1485 case Instruction::URem:
1567 case Instruction::URem:
1657 case Instruction::URem:
InstCombineMulDivRem.cpp 10 // srem, urem, frem.
290 auto RemOpc = Div->getOpcode() == Instruction::UDiv ? Instruction::URem
976 // urem (zext X), (zext Y) --> zext (urem X, Y)
990 // urem (zext X), C --> zext (urem X, C')
992 // urem C, (zext X) --> zext (urem C', X)
1425 /// instructions (urem and srem). It is called by the visitors to those integer
1447 (I.getOpcode() == Instruction::URem ||
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/
ExecutionEngine.cpp 780 case Instruction::URem:
798 case Instruction::URem:GV.IntVal = LHS.IntVal.urem(RHS.IntVal); break;
  /src/external/apache2/llvm/dist/llvm/lib/AsmParser/
LLLexer.cpp 869 INSTKEYWORD(urem, URem); INSTKEYWORD(srem, SRem); INSTKEYWORD(frem, FRem);
  /src/external/apache2/llvm/dist/llvm/tools/llvm-stress/
llvm-stress.cpp 401 case 6:{Op = (isFloat?Instruction::FRem : Instruction::URem); break; }
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTargetTransformInfo.cpp 663 J->getOpcode() == Instruction::URem ||

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