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Searched refs:USBN_CLK_CTL_OFFSET (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/mips/cavium/dev/
octeon_dwctwo.c	199 clk = octeon_dwc2_reg_rd(sc, USBN_CLK_CTL_OFFSET); 218 octeon_dwc2_reg_wr(sc, USBN_CLK_CTL_OFFSET, clk); 222 octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_HCLK_RST); 234 clk = octeon_dwc2_reg_rd(sc, USBN_CLK_CTL_OFFSET); 236 octeon_dwc2_reg_wr(sc, USBN_CLK_CTL_OFFSET, clk); 250 octeon_dwc2_reg_deassert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_POR); 278 octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_PRST); 294 octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_HRST); 299 octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_ENABLE);
octeon_usbnreg.h	`204 #define USBN_CLK_CTL_OFFSET 0x00000010`

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