HomeSort by: relevance | last modified time | path
    Searched refs:UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 163 #define UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT 0x0000000d
uvd_4_2_sh_mask.h 192 #define UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT 0xd
uvd_5_0_sh_mask.h 208 #define UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT 0xd
uvd_6_0_sh_mask.h 210 #define UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT 0xd
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 861 #define UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT 0xd
vcn_2_0_0_sh_mask.h 1881 #define UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT 0xd
vcn_2_5_sh_mask.h 1931 #define UVD_CGC_STATUS__LMI_UMC_SCLK__SHIFT 0xd

Completed in 41 milliseconds