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    Searched refs:UVD_CGC_STATUS__MPC_SCLK__SHIFT (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 169 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x00000013
uvd_4_2_sh_mask.h 204 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13
uvd_5_0_sh_mask.h 220 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13
uvd_6_0_sh_mask.h 222 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 867 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13
vcn_2_0_0_sh_mask.h 1887 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13
vcn_2_5_sh_mask.h 1937 #define UVD_CGC_STATUS__MPC_SCLK__SHIFT 0x13

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