HomeSort by: relevance | last modified time | path
    Searched refs:UVD_CGC_STATUS__RBC_SCLK_MASK (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 182 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x00000800L
uvd_4_2_sh_mask.h 187 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x800
uvd_5_0_sh_mask.h 203 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x800
uvd_6_0_sh_mask.h 205 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x800
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 891 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x00000800L
vcn_2_0_0_sh_mask.h 1910 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x00000800L
vcn_2_5_sh_mask.h 1960 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x00000800L

Completed in 116 milliseconds