HomeSort by: relevance | last modified time | path
    Searched refs:UVD_CGC_STATUS__UDEC_SCLK__SHIFT (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 201 #define UVD_CGC_STATUS__UDEC_SCLK__SHIFT 0x00000003
uvd_4_2_sh_mask.h 172 #define UVD_CGC_STATUS__UDEC_SCLK__SHIFT 0x3
uvd_5_0_sh_mask.h 188 #define UVD_CGC_STATUS__UDEC_SCLK__SHIFT 0x3
uvd_6_0_sh_mask.h 190 #define UVD_CGC_STATUS__UDEC_SCLK__SHIFT 0x3
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 851 #define UVD_CGC_STATUS__UDEC_SCLK__SHIFT 0x3
vcn_2_0_0_sh_mask.h 1871 #define UVD_CGC_STATUS__UDEC_SCLK__SHIFT 0x3
vcn_2_5_sh_mask.h 1921 #define UVD_CGC_STATUS__UDEC_SCLK__SHIFT 0x3

Completed in 43 milliseconds