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    Searched refs:UVD_CGC_STATUS__WCB_SCLK_MASK (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 208 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x01000000L
uvd_4_2_sh_mask.h 213 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x1000000
uvd_5_0_sh_mask.h 229 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x1000000
uvd_6_0_sh_mask.h 231 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x1000000
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 904 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x01000000L
vcn_2_0_0_sh_mask.h 1923 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x01000000L
vcn_2_5_sh_mask.h 1973 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x01000000L

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