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    Searched refs:UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn.h 75 << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT) | \
87 << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT) | \
119 offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \
130 offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 97 #define UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT 0x10
vcn_2_0_0_sh_mask.h 1553 #define UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT 0x10
vcn_2_5_sh_mask.h 1556 #define UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT 0x10

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