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Searched refs:UVD_DPG_LMA_CTL__READ_WRITE__SHIFT (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn.h	`117 (0x0 << UVD_DPG_LMA_CTL__READ_WRITE__SHIFT \| \ 128 (0x1 << UVD_DPG_LMA_CTL__READ_WRITE__SHIFT \| \`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`93 #define UVD_DPG_LMA_CTL__READ_WRITE__SHIFT 0x0`
vcn_2_0_0_sh_mask.h	`1549 #define UVD_DPG_LMA_CTL__READ_WRITE__SHIFT 0x0`
vcn_2_5_sh_mask.h	`1552 #define UVD_DPG_LMA_CTL__READ_WRITE__SHIFT 0x0`

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