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    Searched refs:UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 259 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x00000000
uvd_4_2_sh_mask.h 52 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x0
uvd_5_0_sh_mask.h 52 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x0
uvd_6_0_sh_mask.h 52 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x0
uvd_7_0_sh_mask.h 125 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x0
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 315 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x0
vcn_2_0_0_sh_mask.h 3175 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x0
vcn_2_5_sh_mask.h 2204 #define UVD_GPCOM_VCPU_DATA1__DATA1__SHIFT 0x0

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