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Searched refs:UVD_SEMA_CMD__MODE_MASK (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h	`618 #define UVD_SEMA_CMD__MODE_MASK 0x00000040L`
uvd_4_2_sh_mask.h	`37 #define UVD_SEMA_CMD__MODE_MASK 0x40`
uvd_5_0_sh_mask.h	`37 #define UVD_SEMA_CMD__MODE_MASK 0x40`
uvd_6_0_sh_mask.h	`37 #define UVD_SEMA_CMD__MODE_MASK 0x40`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`301 #define UVD_SEMA_CMD__MODE_MASK 0x00000040L`
vcn_2_0_0_sh_mask.h	`3161 #define UVD_SEMA_CMD__MODE_MASK 0x00000040L`
vcn_2_5_sh_mask.h	`2960 #define UVD_SEMA_CMD__MODE_MASK 0x00000040L`

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