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Searched refs:UVD_SOFT_RESET__MPC_DCLK_RESET_STATUS__SHIFT (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_sh_mask.h	`650 #define UVD_SOFT_RESET__MPC_DCLK_RESET_STATUS__SHIFT 0x16`
uvd_6_0_sh_mask.h	`652 #define UVD_SOFT_RESET__MPC_DCLK_RESET_STATUS__SHIFT 0x16`
uvd_7_0_sh_mask.h	`688 #define UVD_SOFT_RESET__MPC_DCLK_RESET_STATUS__SHIFT 0x16`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`1212 #define UVD_SOFT_RESET__MPC_DCLK_RESET_STATUS__SHIFT 0x16`
vcn_2_0_0_sh_mask.h	`2815 #define UVD_SOFT_RESET__MPC_DCLK_RESET_STATUS__SHIFT 0x16`
vcn_2_5_sh_mask.h	`1821 #define UVD_SOFT_RESET__MPC_DCLK_RESET_STATUS__SHIFT 0x16`

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