HomeSort by: relevance | last modified time | path
    Searched refs:UVD_SUVD_CGC_STATUS__SDB_DCLK__SHIFT (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_sh_mask.h 766 #define UVD_SUVD_CGC_STATUS__SDB_DCLK__SHIFT 0x5
uvd_6_0_sh_mask.h 764 #define UVD_SUVD_CGC_STATUS__SDB_DCLK__SHIFT 0x5
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 487 #define UVD_SUVD_CGC_STATUS__SDB_DCLK__SHIFT 0x5
vcn_2_0_0_sh_mask.h 3243 #define UVD_SUVD_CGC_STATUS__SDB_DCLK__SHIFT 0x5
vcn_2_5_sh_mask.h 2117 #define UVD_SUVD_CGC_STATUS__SDB_DCLK__SHIFT 0x5

Completed in 39 milliseconds