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Searched refs:UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK__SHIFT (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_sh_mask.h	`782 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK__SHIFT 0xd`
uvd_6_0_sh_mask.h	`780 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK__SHIFT 0xd`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`495 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK__SHIFT 0xd`
vcn_2_0_0_sh_mask.h	`3251 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK__SHIFT 0xd`
vcn_2_5_sh_mask.h	`2125 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK__SHIFT 0xd`

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