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Searched refs:UVD_SUVD_CGC_STATUS__SRE_H264_VCLK__SHIFT (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_sh_mask.h	`768 #define UVD_SUVD_CGC_STATUS__SRE_H264_VCLK__SHIFT 0x6`
uvd_6_0_sh_mask.h	`766 #define UVD_SUVD_CGC_STATUS__SRE_H264_VCLK__SHIFT 0x6`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`488 #define UVD_SUVD_CGC_STATUS__SRE_H264_VCLK__SHIFT 0x6`
vcn_2_0_0_sh_mask.h	`3244 #define UVD_SUVD_CGC_STATUS__SRE_H264_VCLK__SHIFT 0x6`
vcn_2_5_sh_mask.h	`2118 #define UVD_SUVD_CGC_STATUS__SRE_H264_VCLK__SHIFT 0x6`

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