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Searched refs:UVD_UDEC_DBW_ADDR_CONFIG__NUM_GPUS_MASK (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h	`736 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_GPUS_MASK 0x00700000L`
uvd_4_2_sh_mask.h	`103 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_GPUS_MASK 0x700000`
uvd_5_0_sh_mask.h	`103 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_GPUS_MASK 0x700000`
uvd_6_0_sh_mask.h	`103 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_GPUS_MASK 0x700000`
uvd_7_0_sh_mask.h	`202 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_GPUS_MASK 0x00E00000L`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`424 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_GPUS_MASK 0x00E00000L`

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