HomeSort by: relevance | last modified time | path
    Searched refs:UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 750 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x01ffffffL
uvd_4_2_sh_mask.h 525 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x1ffffff
uvd_5_0_sh_mask.h 557 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x1ffffff
uvd_6_0_sh_mask.h 559 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x1ffffff
uvd_7_0_sh_mask.h 649 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x01FFFFFFL
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 1169 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x001FFFFFL
vcn_2_0_0_sh_mask.h 2675 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x001FFFFFL
vcn_2_5_sh_mask.h 2679 #define UVD_VCPU_CACHE_OFFSET0__CACHE_OFFSET0_MASK 0x001FFFFFL

Completed in 41 milliseconds