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    Searched refs:UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 756 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x001fffffL
uvd_4_2_sh_mask.h 527 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x1fffff
uvd_5_0_sh_mask.h 559 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x1fffff
uvd_6_0_sh_mask.h 561 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x1fffff
uvd_7_0_sh_mask.h 652 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x001FFFFFL
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 1172 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x001FFFFFL
vcn_2_0_0_sh_mask.h 2678 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x001FFFFFL
vcn_2_5_sh_mask.h 2682 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x001FFFFFL

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