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    Searched refs:UseRC (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 106 const TargetRegisterClass *UseRC = nullptr;
111 UseRC = TLI->getRegClassFor(VT, Node->isDivergent());
141 if (!UseRC)
142 UseRC = RC;
145 TRI->getCommonSubClass(UseRC, RC);
149 UseRC = ComRC;
165 } else if (UseRC) {
166 assert(TRI->isTypeLegalForClass(*UseRC, VT) &&
168 DstRC = UseRC;
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCFastISel.cpp 464 const TargetRegisterClass *UseRC =
472 bool Is32BitInt = UseRC->hasSuperClassEq(&PPC::GPRCRegClass);
492 assert(UseRC->hasSuperClassEq(&PPC::G8RCRegClass) &&
511 bool IsVSSRC = isVSSRCRegClass(UseRC);
512 bool IsVSFRC = isVSFRCRegClass(UseRC);
522 ResultReg = createResultReg(UseRC);
2433 const TargetRegisterClass *UseRC =
2437 return FastISel::fastEmitInst_ri(MachineInstOpcode, UseRC, Op0, Imm);
2446 const TargetRegisterClass *UseRC =
2450 return FastISel::fastEmitInst_r(MachineInstOpcode, UseRC, Op0)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIFixSGPRCopies.cpp 805 const TargetRegisterClass *UseRC = MRI->getRegClass(Use.getReg());
807 UseRC != &AMDGPU::VReg_1RegClass)
SIFoldOperands.cpp 917 const TargetRegisterClass *UseRC = MRI->getRegClass(UseReg);
919 if (AMDGPU::getRegBitWidth(UseRC->getID()) != 64)

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