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    Searched refs:VCS1 (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
mmio_context.c 132 {VCS1, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
160 [VCS1] = 0xca00,
347 [VCS1] = 0x4268,
407 [VCS1] = 0xca00,
execlist.c 58 [VCS1] = VCS2_AS_CONTEXT_SWITCH,
interrupt.c 544 if (HAS_ENGINE(gvt->dev_priv, VCS1)) {
cmd_parser.c 419 #define R_VCS2 BIT(VCS1)
631 [VCS1] = {
1103 [VCS1] = {
handlers.c 347 engine_mask |= BIT(VCS1);
1785 id = VCS1;
1863 if (HAS_ENGINE(dev_priv, VCS1)) \
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_pci.c 581 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
642 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
718 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
739 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_engine_types.h 116 VCS1,
intel_mocs.c 363 [VCS1] = __GEN9_VCS1_MOCS0,
intel_reset.c 324 [VCS1] = GEN8_GRDOM_MEDIA2,
455 [VCS1] = GEN11_GRDOM_MEDIA2,
intel_engine_cs.c 103 [VCS1] = {
intel_lrc.c 4359 [VCS1] = GEN8_VCS1_IRQ_SHIFT,

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