HomeSort by: relevance | last modified time | path
    Searched refs:VECREDUCE_SMAX (Results 1 - 13 of 13) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1224 VECREDUCE_SMAX,
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorOps.cpp 482 case ISD::VECREDUCE_SMAX:
886 case ISD::VECREDUCE_SMAX:
SelectionDAGDumper.cpp 475 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
LegalizeIntegerTypes.cpp 213 case ISD::VECREDUCE_SMAX:
1555 case ISD::VECREDUCE_SMAX:
2005 case ISD::VECREDUCE_SMAX:
2203 case ISD::VECREDUCE_SMAX:
LegalizeVectorTypes.cpp 656 case ISD::VECREDUCE_SMAX:
2221 case ISD::VECREDUCE_SMAX:
4574 case ISD::VECREDUCE_SMAX:
LegalizeDAG.cpp 1172 case ISD::VECREDUCE_SMAX:
3773 case ISD::VECREDUCE_SMAX:
SelectionDAG.cpp 388 case ISD::VECREDUCE_SMAX:
5016 case ISD::VECREDUCE_SMAX:
SelectionDAGBuilder.cpp 9306 Res = DAG.getNode(ISD::VECREDUCE_SMAX, dl, VT, Op1);
DAGCombiner.cpp 1733 case ISD::VECREDUCE_SMAX:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 832 setOperationAction(ISD::VECREDUCE_SMAX, VT, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 429 setOperationAction(ISD::VECREDUCE_SMAX, MVT::i64, Custom);
503 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom);
719 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom);
2285 case ISD::VECREDUCE_SMAX:
3496 case ISD::VECREDUCE_SMAX:
5080 case ISD::VECREDUCE_SMAX:
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 1058 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom);
1159 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom);
1319 setOperationAction(ISD::VECREDUCE_SMAX, MVT::v2i64, Custom);
1520 setOperationAction(ISD::VECREDUCE_SMAX, VT, Custom);
4644 case ISD::VECREDUCE_SMAX:
10611 case ISD::VECREDUCE_SMAX:
10637 case ISD::VECREDUCE_SMAX:
16698 case ISD::VECREDUCE_SMAX:
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 298 setOperationAction(ISD::VECREDUCE_SMAX, VT, Legal);
12519 } else if ((TrueVal->getOpcode() == ISD::VECREDUCE_SMAX ||
12520 FalseVal->getOpcode() == ISD::VECREDUCE_SMAX) &&
12533 case ISD::VECREDUCE_SMAX:

Completed in 172 milliseconds