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    Searched refs:VECREDUCE_UMAX (Results 1 - 13 of 13) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1226 VECREDUCE_UMAX,
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorOps.cpp 484 case ISD::VECREDUCE_UMAX:
888 case ISD::VECREDUCE_UMAX:
SelectionDAGDumper.cpp 477 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
LegalizeIntegerTypes.cpp 215 case ISD::VECREDUCE_UMAX:
1557 case ISD::VECREDUCE_UMAX:
2009 case ISD::VECREDUCE_UMAX:
2205 case ISD::VECREDUCE_UMAX:
LegalizeVectorTypes.cpp 658 case ISD::VECREDUCE_UMAX:
2223 case ISD::VECREDUCE_UMAX:
4576 case ISD::VECREDUCE_UMAX:
LegalizeDAG.cpp 1174 case ISD::VECREDUCE_UMAX:
3775 case ISD::VECREDUCE_UMAX:
SelectionDAG.cpp 392 case ISD::VECREDUCE_UMAX:
5012 case ISD::VECREDUCE_UMAX:
DAGCombiner.cpp 1735 case ISD::VECREDUCE_UMAX:
21620 ? ISD::VECREDUCE_UMIN : ISD::VECREDUCE_UMAX;
SelectionDAGBuilder.cpp 9312 Res = DAG.getNode(ISD::VECREDUCE_UMAX, dl, VT, Op1);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 834 setOperationAction(ISD::VECREDUCE_UMAX, VT, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 431 setOperationAction(ISD::VECREDUCE_UMAX, MVT::i64, Custom);
505 setOperationAction(ISD::VECREDUCE_UMAX, VT, Custom);
721 setOperationAction(ISD::VECREDUCE_UMAX, VT, Custom);
2284 case ISD::VECREDUCE_UMAX:
3494 case ISD::VECREDUCE_UMAX:
5081 case ISD::VECREDUCE_UMAX:
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 1060 setOperationAction(ISD::VECREDUCE_UMAX, VT, Custom);
1157 setOperationAction(ISD::VECREDUCE_UMAX, VT, Custom);
1321 setOperationAction(ISD::VECREDUCE_UMAX, MVT::v2i64, Custom);
1522 setOperationAction(ISD::VECREDUCE_UMAX, VT, Custom);
4646 case ISD::VECREDUCE_UMAX:
10615 case ISD::VECREDUCE_UMAX:
10641 case ISD::VECREDUCE_UMAX:
16700 case ISD::VECREDUCE_UMAX:
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 299 setOperationAction(ISD::VECREDUCE_UMAX, VT, Legal);
12513 } else if ((TrueVal->getOpcode() == ISD::VECREDUCE_UMAX ||
12514 FalseVal->getOpcode() == ISD::VECREDUCE_UMAX) &&
12532 case ISD::VECREDUCE_UMAX:

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