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Searched
refs:VM_L2_CNTL3
(Results
1 - 17
of
17
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfxhub_v1_0.c
168
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, BANK_SELECT, 12);
169
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
,
172
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, BANK_SELECT, 9);
173
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
,
amdgpu_mmhub_v1_0.c
187
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, BANK_SELECT, 12);
188
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
,
191
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, BANK_SELECT, 9);
192
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
,
amdgpu_gmc_v7_0.c
662
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY, 1);
663
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, BANK_SELECT, field);
664
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, L2_CACHE_BIGK_FRAGMENT_SIZE, field);
amdgpu_gmc_v8_0.c
884
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY, 1);
885
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, BANK_SELECT, field);
886
tmp = REG_SET_FIELD(tmp,
VM_L2_CNTL3
, L2_CACHE_BIGK_FRAGMENT_SIZE, field);
sid.h
389
#define
VM_L2_CNTL3
0x502
/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rv770.c
919
WREG32(
VM_L2_CNTL3
, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
965
WREG32(
VM_L2_CNTL3
, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
996
WREG32(
VM_L2_CNTL3
, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
rv770d.h
652
#define
VM_L2_CNTL3
0x1408
radeon_ni.c
1308
WREG32(
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY |
1387
WREG32(
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY |
nid.h
122
#define
VM_L2_CNTL3
0x1408
radeon_r600.c
1180
WREG32(
VM_L2_CNTL3
, BANK_SELECT_0(0) | BANK_SELECT_1(1));
1232
WREG32(
VM_L2_CNTL3
, BANK_SELECT_0(0) | BANK_SELECT_1(1));
1272
WREG32(
VM_L2_CNTL3
, BANK_SELECT_0(0) | BANK_SELECT_1(1));
cikd.h
505
#define
VM_L2_CNTL3
0x1408
sid.h
387
#define
VM_L2_CNTL3
0x1408
radeon_evergreen.c
2419
WREG32(
VM_L2_CNTL3
, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
2472
WREG32(
VM_L2_CNTL3
, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
2502
WREG32(
VM_L2_CNTL3
, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));
evergreend.h
1160
#define
VM_L2_CNTL3
0x1408
r600d.h
597
#define
VM_L2_CNTL3
0x1408
radeon_si.c
4319
WREG32(
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY |
4405
WREG32(
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY |
radeon_cik.c
5473
WREG32(
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY |
5590
WREG32(
VM_L2_CNTL3
, L2_CACHE_BIGK_ASSOCIATIVITY |
Completed in 58 milliseconds
Indexes created Sun Oct 19 02:09:48 GMT 2025